FR3061799B1 - Procede de determination d'une fenetre memoire d'une memoire vive resistive - Google Patents

Procede de determination d'une fenetre memoire d'une memoire vive resistive Download PDF

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Publication number
FR3061799B1
FR3061799B1 FR1750122A FR1750122A FR3061799B1 FR 3061799 B1 FR3061799 B1 FR 3061799B1 FR 1750122 A FR1750122 A FR 1750122A FR 1750122 A FR1750122 A FR 1750122A FR 3061799 B1 FR3061799 B1 FR 3061799B1
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FR
France
Prior art keywords
resistive
memory
state
cycle
highly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1750122A
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English (en)
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FR3061799A1 (fr
Inventor
Guiseppe Piccolboni
Gabriel Molas
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1750122A priority Critical patent/FR3061799B1/fr
Priority to US15/860,244 priority patent/US10438660B2/en
Publication of FR3061799A1 publication Critical patent/FR3061799A1/fr
Application granted granted Critical
Publication of FR3061799B1 publication Critical patent/FR3061799B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009RRAM elements whose operation depends upon chemical change
    • G11C13/0011RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0035Evaluating degradation, retention or wearout, e.g. by counting writing cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/004Reading or sensing circuits or methods
    • G11C2013/0054Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G11C5/05Supporting of cores in matrix

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

Procédé (1) de détermination d'une fenêtre mémoire d'au moins une cellule mémoire vive résistive, la cellule mémoire vive résistive comportant un état hautement résistif et un état faiblement résistif, le passage de la mémoire vive résistive d'un état initial parmi l'état hautement résistif ou l'état faiblement résistif à un autre état puis le retour à l'état initial formant un cycle, ledit procédé comprenant les étapes suivantes : ○ mesurer les valeurs des résistances des états hautement résistif et faiblement résistif à un cycle j donné, j étant un nombre entier ; ○ déterminer la fenêtre mémoire à utiliser pendant les n cycles suivant le cycle donné j, n étant un nombre entier, la fenêtre mémoire étant calculée en prenant en compte au moins les résistances des états hautement et faiblement résistif au cycle j.
FR1750122A 2017-01-06 2017-01-06 Procede de determination d'une fenetre memoire d'une memoire vive resistive Active FR3061799B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1750122A FR3061799B1 (fr) 2017-01-06 2017-01-06 Procede de determination d'une fenetre memoire d'une memoire vive resistive
US15/860,244 US10438660B2 (en) 2017-01-06 2018-01-02 Method for determining a memory window of a resistive random access memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1750122 2017-01-06
FR1750122A FR3061799B1 (fr) 2017-01-06 2017-01-06 Procede de determination d'une fenetre memoire d'une memoire vive resistive

Publications (2)

Publication Number Publication Date
FR3061799A1 FR3061799A1 (fr) 2018-07-13
FR3061799B1 true FR3061799B1 (fr) 2020-06-19

Family

ID=58401855

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1750122A Active FR3061799B1 (fr) 2017-01-06 2017-01-06 Procede de determination d'une fenetre memoire d'une memoire vive resistive

Country Status (2)

Country Link
US (1) US10438660B2 (fr)
FR (1) FR3061799B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3097368B1 (fr) * 2019-06-12 2021-06-25 Commissariat Energie Atomique Procédé de détermination d’un paramètre de fabrication d’une cellule de mémoire vive résistive

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7872900B2 (en) * 2006-11-08 2011-01-18 Symetrix Corporation Correlated electron memory
US20080107801A1 (en) * 2006-11-08 2008-05-08 Symetrix Corporation Method of making a variable resistance memory
US7633797B2 (en) * 2007-01-25 2009-12-15 Macronix International Co., Ltd. Flash memory and method for determining logic states thereof
US9305643B2 (en) * 2012-03-27 2016-04-05 Adesto Technologies Corporation Solid electrolyte based memory devices and methods having adaptable read threshold levels
US10002664B2 (en) * 2013-09-18 2018-06-19 Commissariat A L'energie Atomique Et Aux Energies Alternatives Non-volatile resistive memory cell comprising metal electrodes and a solid electrolyte between the metal electrodes
FR3014592B1 (fr) * 2013-12-11 2016-01-22 Commissariat Energie Atomique Procede de determination de parametres electriques servant a programmer une memoire vive resistive
FR3019376B1 (fr) * 2014-03-26 2016-04-01 Commissariat Energie Atomique Dispositif de memoire vive resistive
FR3022393B1 (fr) * 2014-06-11 2016-07-01 Commissariat Energie Atomique Dispositif de memoire vive resistive
FR3027444B1 (fr) * 2014-10-15 2017-12-22 Commissariat Energie Atomique Dispositif de memoire vive resistive
FR3066309B1 (fr) * 2017-05-09 2020-10-16 Commissariat Energie Atomique Procede de gestion de l'endurance d'une memoire reinscriptible non volatile et dispositif de programmation d'une telle memoire
FR3066308B1 (fr) * 2017-05-09 2021-07-30 Commissariat Energie Atomique Procede de gestion de l'endurance d'une memoire reinscriptible non volatile et dispositif de programmation d'une telle memoire

Also Published As

Publication number Publication date
US10438660B2 (en) 2019-10-08
FR3061799A1 (fr) 2018-07-13
US20180197603A1 (en) 2018-07-12

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