FR3023411B1 - Generation localisee de contrainte dans un substrat soi - Google Patents

Generation localisee de contrainte dans un substrat soi

Info

Publication number
FR3023411B1
FR3023411B1 FR1456521A FR1456521A FR3023411B1 FR 3023411 B1 FR3023411 B1 FR 3023411B1 FR 1456521 A FR1456521 A FR 1456521A FR 1456521 A FR1456521 A FR 1456521A FR 3023411 B1 FR3023411 B1 FR 3023411B1
Authority
FR
France
Prior art keywords
stress
soil substrate
localized generation
localized
generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1456521A
Other languages
English (en)
Other versions
FR3023411A1 (fr
Inventor
Shay Reboh
Laurent Grenouillet
Royer Cyrille Le
Sylvain Maitrejean
Yves Morand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Crolles 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics Crolles 2 SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics Crolles 2 SAS, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1456521A priority Critical patent/FR3023411B1/fr
Priority to US14/791,713 priority patent/US9502558B2/en
Publication of FR3023411A1 publication Critical patent/FR3023411A1/fr
Application granted granted Critical
Publication of FR3023411B1 publication Critical patent/FR3023411B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7847—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate using a memorization technique, e.g. re-crystallization under strain, bonding on a substrate having a thermal expansion coefficient different from the one of the region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02592—Microstructure amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7849—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being provided under the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR1456521A 2014-07-07 2014-07-07 Generation localisee de contrainte dans un substrat soi Active FR3023411B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1456521A FR3023411B1 (fr) 2014-07-07 2014-07-07 Generation localisee de contrainte dans un substrat soi
US14/791,713 US9502558B2 (en) 2014-07-07 2015-07-06 Local strain generation in an SOI substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1456521A FR3023411B1 (fr) 2014-07-07 2014-07-07 Generation localisee de contrainte dans un substrat soi

Publications (2)

Publication Number Publication Date
FR3023411A1 FR3023411A1 (fr) 2016-01-08
FR3023411B1 true FR3023411B1 (fr) 2017-12-22

Family

ID=51485757

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1456521A Active FR3023411B1 (fr) 2014-07-07 2014-07-07 Generation localisee de contrainte dans un substrat soi

Country Status (2)

Country Link
US (1) US9502558B2 (fr)
FR (1) FR3023411B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3033081B1 (fr) 2015-02-24 2017-03-31 Commissariat Energie Atomique Procede de modification de l'etat de contrainte d'une structure semi-conductrice a etages de canal de transistor
FR3076292B1 (fr) * 2017-12-28 2020-01-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de transfert d'une couche utile sur un substrat support
KR102414957B1 (ko) 2018-06-15 2022-06-29 삼성전자주식회사 반도체 장치의 제조 방법
FR3088480B1 (fr) 2018-11-09 2020-12-04 Commissariat Energie Atomique Procede de collage avec desorption stimulee electroniquement
FR3091619B1 (fr) 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de guérison avant transfert d’une couche semi-conductrice
FR3091620B1 (fr) 2019-01-07 2021-01-29 Commissariat Energie Atomique Procédé de transfert de couche avec réduction localisée d’une capacité à initier une fracture
FR3100083B1 (fr) 2019-08-20 2021-09-10 Commissariat Energie Atomique Procédé de guérison d’une couche implantée comprenant un traitement thermique préalable à une recristallisation par recuit laser
EP3840033A1 (fr) 2019-12-17 2021-06-23 Commissariat à l'énergie atomique et aux énergies alternatives Procédé de fabrication d'un substrat rf-soi à couche de piégeage issue d'une transformation cristalline d'une couche enterrée

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7335545B2 (en) * 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
US7288448B2 (en) * 2004-08-24 2007-10-30 Orlowski Marius K Method and apparatus for mobility enhancement in a semiconductor device
US7488670B2 (en) * 2005-07-13 2009-02-10 Infineon Technologies Ag Direct channel stress
US7384851B2 (en) * 2005-07-15 2008-06-10 International Business Machines Corporation Buried stress isolation for high-performance CMOS technology
US7468313B2 (en) * 2006-05-30 2008-12-23 Freescale Semiconductor, Inc. Engineering strain in thick strained-SOI substrates
JP2007335573A (ja) * 2006-06-14 2007-12-27 Hitachi Ltd 半導体装置およびその製造方法
DE102006035646B3 (de) * 2006-07-31 2008-03-27 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung verformter Transistoren durch Verspannungskonservierung auf der Grundlage einer verspannten Implantationsmaske
US20110254092A1 (en) * 2010-04-14 2011-10-20 Globalfoundries Inc. Etsoi cmos architecture with dual backside stressors
US9461169B2 (en) * 2010-05-28 2016-10-04 Globalfoundries Inc. Device and method for fabricating thin semiconductor channel and buried strain memorization layer
US8536032B2 (en) * 2011-06-08 2013-09-17 International Business Machines Corporation Formation of embedded stressor through ion implantation
US8507354B2 (en) * 2011-12-08 2013-08-13 International Business Machines Corporation On-chip capacitors in combination with CMOS devices on extremely thin semiconductor on insulator (ETSOI) substrates
US8723266B2 (en) * 2011-12-13 2014-05-13 Taiwan Semiconductor Manufacturing Company, Ltd. Pinch-off control of gate edge dislocation
FR2989517B1 (fr) 2012-04-12 2015-01-16 Commissariat Energie Atomique Reprise de contact sur substrat semi-conducteur heterogene
FR2993394B1 (fr) 2012-07-11 2014-08-22 Commissariat Energie Atomique Transistor tunnel a fort courant par amplification bipolaire
FR3005309B1 (fr) 2013-05-02 2016-03-11 Commissariat Energie Atomique Transistors a nanofils et planaires cointegres sur substrat soi utbox
FR3009887B1 (fr) 2013-08-20 2015-09-25 Commissariat Energie Atomique Procede ameliore de separation entre une zone active d'un substrat et sa face arriere ou une portion de sa face arriere
FR3014244B1 (fr) 2013-11-29 2018-05-25 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede ameliore de realisation d'un substrat semi-conducteur contraint sur isolant
FR3015768B1 (fr) 2013-12-23 2017-08-11 Commissariat Energie Atomique Procede ameliore de modification de l'etat de contrainte d'un bloc de materiau semi-conducteur
FR3015769B1 (fr) 2013-12-23 2017-08-11 Commissariat Energie Atomique Procede ameliore de realisation de blocs semi-conducteurs contraints sur la couche isolante d'un substrat semi-conducteur sur isolant

Also Published As

Publication number Publication date
US20160005862A1 (en) 2016-01-07
FR3023411A1 (fr) 2016-01-08
US9502558B2 (en) 2016-11-22

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