FR2992091B1 - Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe - Google Patents

Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe

Info

Publication number
FR2992091B1
FR2992091B1 FR1255590A FR1255590A FR2992091B1 FR 2992091 B1 FR2992091 B1 FR 2992091B1 FR 1255590 A FR1255590 A FR 1255590A FR 1255590 A FR1255590 A FR 1255590A FR 2992091 B1 FR2992091 B1 FR 2992091B1
Authority
FR
France
Prior art keywords
memory access
data recording
associated device
access errors
detecting memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1255590A
Other languages
English (en)
Other versions
FR2992091A1 (fr
Inventor
Olivier Debicki
Matthieu Lemerre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Silicon Mobility SAS
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1255590A priority Critical patent/FR2992091B1/fr
Priority to PCT/EP2013/062409 priority patent/WO2013186377A1/fr
Publication of FR2992091A1 publication Critical patent/FR2992091A1/fr
Application granted granted Critical
Publication of FR2992091B1 publication Critical patent/FR2992091B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
FR1255590A 2012-06-14 2012-06-14 Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe Active FR2992091B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1255590A FR2992091B1 (fr) 2012-06-14 2012-06-14 Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe
PCT/EP2013/062409 WO2013186377A1 (fr) 2012-06-14 2013-06-14 Procédé d'enregistrement de données, procédé de détection des erreurs d'accès à une mémoire et dispositif associé

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1255590A FR2992091B1 (fr) 2012-06-14 2012-06-14 Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe

Publications (2)

Publication Number Publication Date
FR2992091A1 FR2992091A1 (fr) 2013-12-20
FR2992091B1 true FR2992091B1 (fr) 2015-07-03

Family

ID=47351773

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1255590A Active FR2992091B1 (fr) 2012-06-14 2012-06-14 Procede d'enregistrement de donnees, procede de detection des erreurs d'acces a une memoire et dispositif associe

Country Status (2)

Country Link
FR (1) FR2992091B1 (fr)
WO (1) WO2013186377A1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0463210B1 (fr) * 1990-06-27 1995-05-31 International Business Machines Corporation Méthode et appareil de contrôle d'adresse et de contenu d'un dispositif de mémoire
US7203890B1 (en) * 2004-06-16 2007-04-10 Azul Systems, Inc. Address error detection by merging a polynomial-based CRC code of address bits with two nibbles of data or data ECC bits
JP4799027B2 (ja) * 2005-03-31 2011-10-19 富士通株式会社 記憶制御回路、記憶制御回路におけるアドレスエラーチェック方法

Also Published As

Publication number Publication date
WO2013186377A1 (fr) 2013-12-19
FR2992091A1 (fr) 2013-12-20

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