FR2987957B1 - ASYNCHRONOUS CIRCUIT WITHOUT DELAY - Google Patents

ASYNCHRONOUS CIRCUIT WITHOUT DELAY

Info

Publication number
FR2987957B1
FR2987957B1 FR1200669A FR1200669A FR2987957B1 FR 2987957 B1 FR2987957 B1 FR 2987957B1 FR 1200669 A FR1200669 A FR 1200669A FR 1200669 A FR1200669 A FR 1200669A FR 2987957 B1 FR2987957 B1 FR 2987957B1
Authority
FR
France
Prior art keywords
delay
asynchronous circuit
asynchronous
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1200669A
Other languages
French (fr)
Other versions
FR2987957A1 (en
Inventor
Marc Renaudin
Van Mau David Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TIEMPO
Original Assignee
TIEMPO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TIEMPO filed Critical TIEMPO
Priority to FR1200669A priority Critical patent/FR2987957B1/en
Priority to US13/785,770 priority patent/US8854075B2/en
Priority to EP13354010.4A priority patent/EP2637310B1/en
Publication of FR2987957A1 publication Critical patent/FR2987957A1/en
Application granted granted Critical
Publication of FR2987957B1 publication Critical patent/FR2987957B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
FR1200669A 2012-03-06 2012-03-06 ASYNCHRONOUS CIRCUIT WITHOUT DELAY Active FR2987957B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1200669A FR2987957B1 (en) 2012-03-06 2012-03-06 ASYNCHRONOUS CIRCUIT WITHOUT DELAY
US13/785,770 US8854075B2 (en) 2012-03-06 2013-03-05 Delay-insensitive asynchronous circuit
EP13354010.4A EP2637310B1 (en) 2012-03-06 2013-03-06 Asynchronous circuit that is not sensitive to delays

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1200669A FR2987957B1 (en) 2012-03-06 2012-03-06 ASYNCHRONOUS CIRCUIT WITHOUT DELAY

Publications (2)

Publication Number Publication Date
FR2987957A1 FR2987957A1 (en) 2013-09-13
FR2987957B1 true FR2987957B1 (en) 2014-03-21

Family

ID=47019033

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1200669A Active FR2987957B1 (en) 2012-03-06 2012-03-06 ASYNCHRONOUS CIRCUIT WITHOUT DELAY

Country Status (1)

Country Link
FR (1) FR2987957B1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845633A (en) * 1985-12-02 1989-07-04 Apple Computer Inc. System for programming graphically a programmable, asynchronous logic cell and array
JP3521349B2 (en) * 2000-11-27 2004-04-19 日本電信電話株式会社 Handshake serialization circuit, handshake repetition device, sequential data generation device, and handshake method
JP3488224B2 (en) * 2001-11-16 2004-01-19 沖電気工業株式会社 Transition signal control device, DMA controller and transition signal control processor using the same

Also Published As

Publication number Publication date
FR2987957A1 (en) 2013-09-13

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