FR2979468B1 - Adressage flottant d'une page de memoire eeprom - Google Patents

Adressage flottant d'une page de memoire eeprom

Info

Publication number
FR2979468B1
FR2979468B1 FR1157659A FR1157659A FR2979468B1 FR 2979468 B1 FR2979468 B1 FR 2979468B1 FR 1157659 A FR1157659 A FR 1157659A FR 1157659 A FR1157659 A FR 1157659A FR 2979468 B1 FR2979468 B1 FR 2979468B1
Authority
FR
France
Prior art keywords
addressing
eeprom
floating
memory page
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1157659A
Other languages
English (en)
Other versions
FR2979468A1 (fr
Inventor
Francois Tailliet
Yvon Bahout
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1157659A priority Critical patent/FR2979468B1/fr
Priority to US13/599,222 priority patent/US8717820B2/en
Publication of FR2979468A1 publication Critical patent/FR2979468A1/fr
Application granted granted Critical
Publication of FR2979468B1 publication Critical patent/FR2979468B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
FR1157659A 2011-08-30 2011-08-30 Adressage flottant d'une page de memoire eeprom Expired - Fee Related FR2979468B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1157659A FR2979468B1 (fr) 2011-08-30 2011-08-30 Adressage flottant d'une page de memoire eeprom
US13/599,222 US8717820B2 (en) 2011-08-30 2012-08-30 Floating addressing of an EEPROM memory page

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1157659A FR2979468B1 (fr) 2011-08-30 2011-08-30 Adressage flottant d'une page de memoire eeprom

Publications (2)

Publication Number Publication Date
FR2979468A1 FR2979468A1 (fr) 2013-03-01
FR2979468B1 true FR2979468B1 (fr) 2013-08-23

Family

ID=45319258

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1157659A Expired - Fee Related FR2979468B1 (fr) 2011-08-30 2011-08-30 Adressage flottant d'une page de memoire eeprom

Country Status (2)

Country Link
US (1) US8717820B2 (fr)
FR (1) FR2979468B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9325536B2 (en) 2014-09-19 2016-04-26 Dell Products, Lp Enhanced receiver equalization
US9317649B2 (en) 2014-09-23 2016-04-19 Dell Products, Lp System and method of determining high speed resonance due to coupling from broadside layers
US9531569B2 (en) 2014-10-08 2016-12-27 Dell Products, Lp Power aware receiver/transmitter adaptation for high speed serial interfaces
US9313056B1 (en) 2014-11-07 2016-04-12 Dell Products, Lp System aware transmitter adaptation for high speed serial interfaces
US10872666B2 (en) * 2019-02-22 2020-12-22 Micron Technology, Inc. Source line management for memory cells with floating gates

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5774413A (en) * 1996-12-12 1998-06-30 Cypress Semiconductor Corporation Sensed wordline driver
US6813677B1 (en) * 2000-06-02 2004-11-02 Stmicroelectronics, Inc. Memory decoder and method of operation
US6469954B1 (en) * 2000-08-21 2002-10-22 Micron Technology, Inc. Device and method for reducing idle cycles in a semiconductor memory device
US7061815B2 (en) * 2003-08-05 2006-06-13 Stmicroelectronics Pvt. Ltd. Semiconductor memory device providing redundancy
US7272070B2 (en) * 2004-12-21 2007-09-18 Infineon Technologies Ag Memory access using multiple activated memory cell rows
US7610544B2 (en) * 2005-05-18 2009-10-27 Telegent Systems, Inc. Erasure generation in a forward-error-correcting communication system
US7730276B1 (en) * 2005-10-25 2010-06-01 Xilinx, Inc. Striping of data into memory of a network data switch to prevent read and write collisions
KR20100055105A (ko) * 2008-11-17 2010-05-26 삼성전자주식회사 상 변화 메모리 장치

Also Published As

Publication number Publication date
FR2979468A1 (fr) 2013-03-01
US20130051153A1 (en) 2013-02-28
US8717820B2 (en) 2014-05-06

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20150430