FR2976147B1 - Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securise - Google Patents
Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securiseInfo
- Publication number
- FR2976147B1 FR2976147B1 FR1154694A FR1154694A FR2976147B1 FR 2976147 B1 FR2976147 B1 FR 2976147B1 FR 1154694 A FR1154694 A FR 1154694A FR 1154694 A FR1154694 A FR 1154694A FR 2976147 B1 FR2976147 B1 FR 2976147B1
- Authority
- FR
- France
- Prior art keywords
- data
- integrity
- word
- external memory
- words
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000010586 diagram Methods 0.000 title 1
- 230000000737 periodic effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0894—Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1154694A FR2976147B1 (fr) | 2011-05-30 | 2011-05-30 | Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securise |
CN201210172262.7A CN102855161B (zh) | 2011-05-30 | 2012-05-29 | 用于安全微控制器的外部存储器的数据交织方案 |
US13/483,669 US10797857B2 (en) | 2011-05-30 | 2012-05-30 | Data interleaving scheme for an external memory of a secure microcontroller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1154694A FR2976147B1 (fr) | 2011-05-30 | 2011-05-30 | Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securise |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2976147A1 FR2976147A1 (fr) | 2012-12-07 |
FR2976147B1 true FR2976147B1 (fr) | 2013-11-22 |
Family
ID=44785931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1154694A Active FR2976147B1 (fr) | 2011-05-30 | 2011-05-30 | Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securise |
Country Status (3)
Country | Link |
---|---|
US (1) | US10797857B2 (fr) |
CN (1) | CN102855161B (fr) |
FR (1) | FR2976147B1 (fr) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9256551B2 (en) | 2013-08-09 | 2016-02-09 | Apple Inc. | Embedded encryption/secure memory management unit for peripheral interface controller |
US9419952B2 (en) * | 2014-06-05 | 2016-08-16 | Stmicroelectronics (Grenoble 2) Sas | Memory encryption method compatible with a memory interleaved system and corresponding system |
US10223289B2 (en) * | 2015-07-07 | 2019-03-05 | Qualcomm Incorporated | Secure handling of memory caches and cached software module identities for a method to isolate software modules by means of controlled encryption key management |
CN106681941A (zh) * | 2015-11-07 | 2017-05-17 | 上海复旦微电子集团股份有限公司 | 存储器的数据写入、读出方法及装置 |
US10594491B2 (en) * | 2015-12-24 | 2020-03-17 | Intel Corporation | Cryptographic system memory management |
US10992453B2 (en) * | 2016-05-18 | 2021-04-27 | International Business Machines Corporation | System architecture for encrypting external memory |
US11163701B2 (en) * | 2018-11-15 | 2021-11-02 | Intel Corporation | System, apparatus and method for integrity protecting tenant workloads in a multi-tenant computing environment |
US11763008B2 (en) | 2020-01-15 | 2023-09-19 | International Business Machines Corporation | Encrypting data using an encryption path and a bypass path |
US11520709B2 (en) * | 2020-01-15 | 2022-12-06 | International Business Machines Corporation | Memory based encryption using an encryption key based on a physical address |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0511807A1 (fr) | 1991-04-27 | 1992-11-04 | Gec Avery Limited | Appareil et unité capteur pour afficher l'évolution d'une grandeur physique dans le temps |
US5892900A (en) * | 1996-08-30 | 1999-04-06 | Intertrust Technologies Corp. | Systems and methods for secure transaction management and electronic rights protection |
US6708274B2 (en) * | 1998-04-30 | 2004-03-16 | Intel Corporation | Cryptographically protected paging subsystem |
EP1267515A3 (fr) * | 2000-01-21 | 2004-04-07 | Sony Computer Entertainment Inc. | Méthode et dispositif de cryptage/décryptage symmétrique de données enregistrées |
US7266842B2 (en) * | 2002-04-18 | 2007-09-04 | International Business Machines Corporation | Control function implementing selective transparent data authentication within an integrated system |
EP1797645B1 (fr) * | 2004-08-30 | 2018-08-01 | Google LLC | Systemes et procedes de gestion de la memoire non volatile des telephones sans fil |
US7340672B2 (en) * | 2004-09-20 | 2008-03-04 | Intel Corporation | Providing data integrity for data streams |
US7657756B2 (en) * | 2004-10-08 | 2010-02-02 | International Business Machines Corporaiton | Secure memory caching structures for data, integrity and version values |
US8055970B1 (en) * | 2005-11-14 | 2011-11-08 | Raytheon Company | System and method for parallel processing of data integrity algorithms |
US8830072B2 (en) | 2006-06-12 | 2014-09-09 | Intelleflex Corporation | RF systems and methods for providing visual, tactile, and electronic indicators of an alarm condition |
US7809899B2 (en) * | 2007-05-29 | 2010-10-05 | Lsi Corporation | System for integrity protection for standard 2n-bit multiple sized memory devices |
EP2026470A1 (fr) * | 2007-08-17 | 2009-02-18 | Panasonic Corporation | Vérification de redondance cyclique de fonctionnement sur des segments de codage |
JP2009301482A (ja) | 2008-06-17 | 2009-12-24 | Totoku Electric Co Ltd | 無線タグおよび無線タグ・システム |
US8555015B2 (en) * | 2008-10-23 | 2013-10-08 | Maxim Integrated Products, Inc. | Multi-layer content protecting microcontroller |
EP2221750A1 (fr) | 2009-02-10 | 2010-08-25 | EM Microelectronic-Marin SA | Carte à puce à circuit de mesure à capteur, et procédé de réalisation de la carte à puce |
-
2011
- 2011-05-30 FR FR1154694A patent/FR2976147B1/fr active Active
-
2012
- 2012-05-29 CN CN201210172262.7A patent/CN102855161B/zh active Active
- 2012-05-30 US US13/483,669 patent/US10797857B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN102855161B (zh) | 2018-10-12 |
US10797857B2 (en) | 2020-10-06 |
FR2976147A1 (fr) | 2012-12-07 |
CN102855161A (zh) | 2013-01-02 |
US20120311239A1 (en) | 2012-12-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2976147B1 (fr) | Schema d'entrelacement de donnees pour une memoire externe d'un microcontroleur securise | |
AR096255A1 (es) | Gestión de datos de tablas de paginación | |
WO2008055271A3 (fr) | Accès lisse d'une application à une mémoire principale hybride | |
WO2014031495A3 (fr) | Répertoire de pages actives de traduction de système à allocation et préanalyse basées sur une requête | |
WO2010101609A3 (fr) | Gestion de blocs mémoire | |
BR112016002054A2 (pt) | dados de proteção na memória de um produto consumível | |
CL2015002234A1 (es) | Codificador y decodificador de audio con programa de informacion o metadatos de la estructura de la subcorriente. | |
JP2012174086A5 (fr) | ||
GB2534037A8 (en) | Instructions and logic to provide advanced paging capabilities for secure enclave page caches | |
WO2012082416A3 (fr) | Architecture de cache à cpu en mémoire | |
BR112015001988A2 (pt) | múltiplos conjuntos de campos de atributo dentro de uma única entrada de tabela de página | |
JP2010102719A5 (fr) | ||
ATE538475T1 (de) | Seitenumkehrreihenfolgeschreiben in flash- speichern | |
WO2013158129A8 (fr) | Microcontrôleur configuré pour un décryptage de mémoire externe | |
BR112015025614A8 (pt) | meio de armazenamento legível por computador, sistema e método implementado por computador | |
TW201714092A (en) | Method for managing a memory apparatus, and associated memory apparatus thereof | |
MX346496B (es) | Instrucción de calcular la distancia a una frontera de memoria especificada. | |
WO2012116009A3 (fr) | Procédés et appareils pour adresser des mémoires caches | |
EP4031973A4 (fr) | Accès à des métadonnées stockées pour identifier des dispositifs de mémoire dans lesquels des données sont stockées | |
BR112018076522A2 (pt) | sistema e método para intercalação de canal de memória de módulo ímpar | |
EP2979189A4 (fr) | Stockage de données provenant de lignes de mémoire cache dans une mémoire principale sur la base d'adresses de mémoire | |
EP3087564A4 (fr) | Appareils, mémoires et procédés de décodage d'adresse et de sélection d'une ligne d'accès | |
JP2012138160A5 (ja) | 半導体装置 | |
WO2015020900A3 (fr) | Procédé et dispositif de traitement d'erreur de code correcteur d'erreur (ecc) | |
WO2012082465A3 (fr) | Mémoire à bits de validité et à codes de correction d'erreurs modifiables de manière sélective |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CA | Change of address |
Effective date: 20131120 |
|
PLFP | Fee payment |
Year of fee payment: 6 |
|
PLFP | Fee payment |
Year of fee payment: 7 |
|
PLFP | Fee payment |
Year of fee payment: 8 |
|
PLFP | Fee payment |
Year of fee payment: 9 |
|
PLFP | Fee payment |
Year of fee payment: 10 |
|
PLFP | Fee payment |
Year of fee payment: 11 |
|
PLFP | Fee payment |
Year of fee payment: 12 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |