FR2968104B1 - METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE - Google Patents

METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE

Info

Publication number
FR2968104B1
FR2968104B1 FR1059936A FR1059936A FR2968104B1 FR 2968104 B1 FR2968104 B1 FR 2968104B1 FR 1059936 A FR1059936 A FR 1059936A FR 1059936 A FR1059936 A FR 1059936A FR 2968104 B1 FR2968104 B1 FR 2968104B1
Authority
FR
France
Prior art keywords
application
protecting
cryptographic
homomorphism
cryptographic operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1059936A
Other languages
French (fr)
Other versions
FR2968104A1 (en
Inventor
Michael Adjedj
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verimatrix France SAS
Original Assignee
Logiways France
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Logiways France filed Critical Logiways France
Priority to FR1059936A priority Critical patent/FR2968104B1/en
Priority to EP11306571A priority patent/EP2458776A1/en
Priority to US13/306,695 priority patent/US8595513B2/en
Priority to RU2011148528/08A priority patent/RU2011148528A/en
Priority to JP2011260711A priority patent/JP2012129993A/en
Publication of FR2968104A1 publication Critical patent/FR2968104A1/en
Application granted granted Critical
Publication of FR2968104B1 publication Critical patent/FR2968104B1/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/008—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols involving homomorphic encryption
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Abstract

Ce procédé de protection d'un circuit de cryptographie contre des attaques visant à découvrir une donnée secrète (D , K) utilisée lors de l'exécution par le circuit d'un algorithme de cryptographie comprenant l'application (22) d'au moins une opération cryptographique (O ) à des données (D ), lesdites données appartenant à une première structure mathématique (E) ayant au moins une structure de groupe et munie d'au moins une loi de composition interne, est caractérisé en ce qu'il comprend une étape (OP ) de protection de ladite opération cryptographique, comprenant l'application (20) auxdites données (D ) d'au moins un premier homomorphisme inversible (M ), compatible avec ladite loi de composition interne, avant l'application (22) de ladite opération cryptographique (O ), et l'application (24) d'au moins un deuxième homomorphisme M ), inverse dudit premier homomorphisme (M ), après l'application (22) de ladite opération cryptographique (O ).This method of protecting a cryptographic circuit against attacks aimed at discovering a secret datum (D, K) used during the execution by the circuit of a cryptographic algorithm comprising the application (22) of at least a cryptographic operation (O ) to data (D ), said data belonging to a first mathematical structure (E) having at least one group structure and provided with at least one internal composition law, is characterized in that it comprises a step (OP ) of protecting said cryptographic operation, comprising the application (20) to said data (D ) of at least one first invertible homomorphism (M ), compatible with said internal composition law, before the application ( 22) of said cryptographic operation (O ), and the application (24) of at least one second homomorphism M ), inverse of said first homomorphism (M ), after the application (22) of said cryptographic operation (O ).

FR1059936A 2010-11-30 2010-11-30 METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE Expired - Fee Related FR2968104B1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1059936A FR2968104B1 (en) 2010-11-30 2010-11-30 METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE
EP11306571A EP2458776A1 (en) 2010-11-30 2011-11-28 Method and system for protecting a cryptography device
US13/306,695 US8595513B2 (en) 2010-11-30 2011-11-29 Method and system for protecting a cryptography device
RU2011148528/08A RU2011148528A (en) 2010-11-30 2011-11-29 METHOD AND SYSTEM OF PROTECTION OF CRYPTOGRAPHIC DEVICE
JP2011260711A JP2012129993A (en) 2010-11-30 2011-11-29 Cryptographic device protection method and protection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1059936A FR2968104B1 (en) 2010-11-30 2010-11-30 METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE

Publications (2)

Publication Number Publication Date
FR2968104A1 FR2968104A1 (en) 2012-06-01
FR2968104B1 true FR2968104B1 (en) 2013-07-12

Family

ID=45098993

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1059936A Expired - Fee Related FR2968104B1 (en) 2010-11-30 2010-11-30 METHOD AND SYSTEM FOR PROTECTING A CRYPTOGRAPHIC DEVICE

Country Status (5)

Country Link
US (1) US8595513B2 (en)
EP (1) EP2458776A1 (en)
JP (1) JP2012129993A (en)
FR (1) FR2968104B1 (en)
RU (1) RU2011148528A (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012049679A (en) * 2010-08-25 2012-03-08 Sony Corp Terminal apparatus, server, data processing system, data processing method and program
US8681973B2 (en) * 2010-09-15 2014-03-25 At&T Intellectual Property I, L.P. Methods, systems, and computer program products for performing homomorphic encryption and decryption on individual operations
US9230133B2 (en) * 2014-01-14 2016-01-05 International Business Machines Corporation Secure access for sensitive digital information
US9544150B2 (en) 2014-06-04 2017-01-10 International Business Machines Corporation Using multiple digital identification documents to control information disclosure
CN106716345A (en) 2014-09-30 2017-05-24 皇家飞利浦有限公司 Electronic calculating device for performing obfuscated arithmetic
CN104283673A (en) * 2014-10-09 2015-01-14 东南大学 Random and dynamic voltage regulation anti-attack method for password circuit system and circuit system
WO2016083424A1 (en) * 2014-11-27 2016-06-02 Koninklijke Philips N.V. Electronic calculating device for performing obfuscated arithmetic
CN107004072A (en) 2014-12-12 2017-08-01 皇家飞利浦有限公司 It is electronically generated equipment
RU2698763C2 (en) 2014-12-22 2019-08-29 Конинклейке Филипс Н.В. Electronic computing device
US9967334B2 (en) 2015-03-02 2018-05-08 Dell Products Lp Computing device configuration and management using a secure decentralized transaction ledger
US9967333B2 (en) 2015-03-02 2018-05-08 Dell Products Lp Deferred configuration or instruction execution using a secure distributed transaction ledger
US10484168B2 (en) * 2015-03-02 2019-11-19 Dell Products L.P. Methods and systems for obfuscating data and computations defined in a secure distributed transaction ledger
US9965628B2 (en) 2015-03-02 2018-05-08 Dell Products Lp Device reporting and protection systems and methods using a secure distributed transactional ledger
US10592985B2 (en) 2015-03-02 2020-03-17 Dell Products L.P. Systems and methods for a commodity contracts market using a secure distributed transaction ledger
US9760737B2 (en) 2015-06-12 2017-09-12 Qualcomm Incorporated Techniques for integrated circuit data path confidentiality and extensions thereof
US11270032B1 (en) 2018-12-27 2022-03-08 Thales E-Security, Inc. Tamper switch assembly and installation method thereof
US11764940B2 (en) 2019-01-10 2023-09-19 Duality Technologies, Inc. Secure search of secret data in a semi-trusted environment using homomorphic encryption

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8619977B2 (en) * 2008-01-15 2013-12-31 Inside Secure Representation change of a point on an elliptic curve

Also Published As

Publication number Publication date
US8595513B2 (en) 2013-11-26
EP2458776A1 (en) 2012-05-30
JP2012129993A (en) 2012-07-05
US20120163584A1 (en) 2012-06-28
FR2968104A1 (en) 2012-06-01
RU2011148528A (en) 2013-06-10

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Owner name: VERIMATRIX FRANCE SAS, FR

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