FR2965946B1 - Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel - Google Patents

Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel

Info

Publication number
FR2965946B1
FR2965946B1 FR1003964A FR1003964A FR2965946B1 FR 2965946 B1 FR2965946 B1 FR 2965946B1 FR 1003964 A FR1003964 A FR 1003964A FR 1003964 A FR1003964 A FR 1003964A FR 2965946 B1 FR2965946 B1 FR 2965946B1
Authority
FR
France
Prior art keywords
row
zeros
series
cadence
ordering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1003964A
Other languages
English (en)
Other versions
FR2965946A1 (fr
Inventor
Renaud Sirdey
Vincent David
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1003964A priority Critical patent/FR2965946B1/fr
Priority to US13/824,467 priority patent/US20130263152A1/en
Priority to PCT/FR2011/052176 priority patent/WO2012045942A1/fr
Priority to JP2013532243A priority patent/JP2013539144A/ja
Priority to EP11771245.5A priority patent/EP2625597A1/fr
Publication of FR2965946A1 publication Critical patent/FR2965946A1/fr
Application granted granted Critical
Publication of FR2965946B1 publication Critical patent/FR2965946B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4831—Task transfer initiation or dispatching by interrupt, e.g. masked with variable priority
    • G06F9/4837—Task transfer initiation or dispatching by interrupt, e.g. masked with variable priority time dependent
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G06F7/026—Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/382—Reconfigurable for different fixed word lengths
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
  • Logic Circuits (AREA)
  • Devices For Executing Special Programs (AREA)
FR1003964A 2010-10-07 2010-10-07 Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel Active FR2965946B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1003964A FR2965946B1 (fr) 2010-10-07 2010-10-07 Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel
US13/824,467 US20130263152A1 (en) 2010-10-07 2011-09-21 System for scheduling the execution of tasks based on logical time vectors
PCT/FR2011/052176 WO2012045942A1 (fr) 2010-10-07 2011-09-21 Système d'ordonnancement de l'exécution de taches cadence par un temps logique vectoriel
JP2013532243A JP2013539144A (ja) 2010-10-07 2011-09-21 論理時刻ベクトルに基づくタスクの実行をスケジュールするためのシステム
EP11771245.5A EP2625597A1 (fr) 2010-10-07 2011-09-21 Système d'ordonnancement de l'exécution de taches cadence par un temps logique vectoriel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1003964A FR2965946B1 (fr) 2010-10-07 2010-10-07 Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel

Publications (2)

Publication Number Publication Date
FR2965946A1 FR2965946A1 (fr) 2012-04-13
FR2965946B1 true FR2965946B1 (fr) 2012-12-14

Family

ID=43875279

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1003964A Active FR2965946B1 (fr) 2010-10-07 2010-10-07 Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel

Country Status (5)

Country Link
US (1) US20130263152A1 (fr)
EP (1) EP2625597A1 (fr)
JP (1) JP2013539144A (fr)
FR (1) FR2965946B1 (fr)
WO (1) WO2012045942A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10235190B2 (en) * 2016-12-14 2019-03-19 International Business Machines Corporation Executing instructions to store context information based on routine to be executed

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3938087A (en) * 1974-05-31 1976-02-10 Honeywell Information Systems, Inc. High speed binary comparator
US3927391A (en) * 1975-03-25 1975-12-16 Us Navy Technique for ranking data observations
EP0091214B1 (fr) * 1982-04-02 1988-06-15 Ampex Corporation Comparateur de proportions pour signaux digitaux
JP2739487B2 (ja) * 1988-12-20 1998-04-15 株式会社日立製作所 描画処理装置及びその描画処理装置を用いた画像表示装置
US4935719A (en) * 1989-03-31 1990-06-19 Sgs-Thomson Microelectronics, Inc. Comparator circuitry
IL116210A0 (en) * 1994-12-02 1996-01-31 Intel Corp Microprocessor having a compare operation and a method of comparing packed data in a processor
JPH1153419A (ja) * 1997-08-07 1999-02-26 Fujitsu Ltd 比較演算回路生成装置および生成方法
DK199801743A (da) * 1998-12-29 2000-06-30 Moeller Ole Sum-intervaldetektor
US6384627B1 (en) * 2001-02-16 2002-05-07 Xilinx, Inc. Logic block used as dynamically configurable logic function
US20060288061A1 (en) * 2005-06-20 2006-12-21 Altera Corporation Smaller and faster comparators
US20080005357A1 (en) 2006-06-30 2008-01-03 Microsoft Corporation Synchronizing dataflow computations, particularly in multi-processor setting
FR2965948A1 (fr) * 2010-10-07 2012-04-13 Commissariat Energie Atomique Systeme d'ordonnancement de l'execution de taches cadence par un temps logique vectoriel

Also Published As

Publication number Publication date
US20130263152A1 (en) 2013-10-03
WO2012045942A1 (fr) 2012-04-12
FR2965946A1 (fr) 2012-04-13
JP2013539144A (ja) 2013-10-17
EP2625597A1 (fr) 2013-08-14

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