FR2958063B1 - Dispositif permettant de securiser un bus de type jtag - Google Patents

Dispositif permettant de securiser un bus de type jtag

Info

Publication number
FR2958063B1
FR2958063B1 FR1001225A FR1001225A FR2958063B1 FR 2958063 B1 FR2958063 B1 FR 2958063B1 FR 1001225 A FR1001225 A FR 1001225A FR 1001225 A FR1001225 A FR 1001225A FR 2958063 B1 FR2958063 B1 FR 2958063B1
Authority
FR
France
Prior art keywords
securing
jtag bus
jtag
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1001225A
Other languages
English (en)
Other versions
FR2958063A1 (fr
Inventor
Anthony Doumenjou
Steeve Lemahieu
Gael Mace
Olivier Teyssier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR1001225A priority Critical patent/FR2958063B1/fr
Priority to EP11159546.8A priority patent/EP2372595B1/fr
Priority to US13/071,803 priority patent/US20120079332A1/en
Publication of FR2958063A1 publication Critical patent/FR2958063A1/fr
Application granted granted Critical
Publication of FR2958063B1 publication Critical patent/FR2958063B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31719—Security aspects, e.g. preventing unauthorised access during test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/31855—Interconnection testing, e.g. crosstalk, shortcircuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82—Protecting input, output or interconnection devices
    • G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
FR1001225A 2010-03-26 2010-03-26 Dispositif permettant de securiser un bus de type jtag Expired - Fee Related FR2958063B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1001225A FR2958063B1 (fr) 2010-03-26 2010-03-26 Dispositif permettant de securiser un bus de type jtag
EP11159546.8A EP2372595B1 (fr) 2010-03-26 2011-03-24 Dispositif permettant de sécuriser un bus de type JTAG
US13/071,803 US20120079332A1 (en) 2010-03-26 2011-03-25 Device for securing a jtag type bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1001225A FR2958063B1 (fr) 2010-03-26 2010-03-26 Dispositif permettant de securiser un bus de type jtag

Publications (2)

Publication Number Publication Date
FR2958063A1 FR2958063A1 (fr) 2011-09-30
FR2958063B1 true FR2958063B1 (fr) 2012-04-20

Family

ID=43415163

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1001225A Expired - Fee Related FR2958063B1 (fr) 2010-03-26 2010-03-26 Dispositif permettant de securiser un bus de type jtag

Country Status (3)

Country Link
US (1) US20120079332A1 (fr)
EP (1) EP2372595B1 (fr)
FR (1) FR2958063B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9858421B2 (en) * 2014-07-02 2018-01-02 Dell Products L.P. Systems and methods for detecting hardware tampering of information handling system hardware
KR102251812B1 (ko) * 2015-01-26 2021-05-13 삼성전자주식회사 반도체 장치 및 반도체 장치의 동작 방법
US9940486B2 (en) * 2015-02-23 2018-04-10 Cisco Technology, Inc. Detection of hardware tampering
RU170434U1 (ru) * 2016-05-31 2017-04-25 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Поволжский государственный технологический университет" Программируемый JTAG - модуль диагностирования
US10572675B2 (en) 2016-11-02 2020-02-25 Cisco Technology, Inc. Protecting and monitoring internal bus transactions
DE102018108951B3 (de) * 2018-04-16 2019-06-19 Infineon Technologies Ag Verfahren und anordnung zur bildung einer elektronischen schaltung
US11416758B2 (en) * 2019-04-02 2022-08-16 Nusantao, Inc. Smart edge co-processor

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6141757A (en) * 1998-06-22 2000-10-31 Motorola, Inc. Secure computer with bus monitoring system and methods
US7680753B2 (en) * 2002-07-10 2010-03-16 Satyam Computer Services Limited System and method for fault identification in an electronic system based on context-based alarm analysis
US7539853B2 (en) * 2002-11-18 2009-05-26 Arm Limited Handling interrupts in data processing of data in which only a portion of a function has been processed
US7444546B2 (en) * 2003-04-17 2008-10-28 Arm Limited On-board diagnostic circuit for an integrated circuit
US7080789B2 (en) * 2003-05-09 2006-07-25 Stmicroelectronics, Inc. Smart card including a JTAG test controller and related methods
US7274283B2 (en) * 2004-04-29 2007-09-25 International Business Machines Corporation Method and apparatus for resisting hardware hacking through internal register interface
US7138820B2 (en) * 2004-04-30 2006-11-21 Xilinx, Inc. System monitor in a programmable logic device
US8160824B2 (en) * 2005-01-27 2012-04-17 Electro Industries/Gauge Tech Intelligent electronic device with enhanced power quality monitoring and communication capabilities
US7509250B2 (en) * 2005-04-20 2009-03-24 Honeywell International Inc. Hardware key control of debug interface
US7600166B1 (en) * 2005-06-28 2009-10-06 David Dunn Method and system for providing trusted access to a JTAG scan interface in a microprocessor
US7334173B2 (en) * 2005-06-28 2008-02-19 Transmeta Corporation Method and system for protecting processors from unauthorized debug access
FR2888330B1 (fr) * 2005-07-08 2007-10-05 St Microelectronics Sa Circuit integre comportant un mode de test securise par detection de l'etat d'un signal de commande
US9104894B2 (en) * 2005-12-16 2015-08-11 Hewlett-Packard Development Company, L.P. Hardware enablement using an interface
US20070162759A1 (en) * 2005-12-28 2007-07-12 Motorola, Inc. Protected port for electronic access to an embedded device
US20080028263A1 (en) * 2006-07-25 2008-01-31 Noemi Fernandez Apparatus and method for protection of JTAG scan chains in a microprocessor
US7669102B1 (en) * 2006-09-01 2010-02-23 Xilinx, Inc. JTAG to SPI PROM conduit
US7657722B1 (en) * 2007-06-30 2010-02-02 Cirrus Logic, Inc. Method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit

Also Published As

Publication number Publication date
EP2372595B1 (fr) 2013-09-11
FR2958063A1 (fr) 2011-09-30
US20120079332A1 (en) 2012-03-29
EP2372595A1 (fr) 2011-10-05

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