FR2925191B1 - Architecture de traitement numerique a haute integrite a multiples ressources supervisees - Google Patents

Architecture de traitement numerique a haute integrite a multiples ressources supervisees

Info

Publication number
FR2925191B1
FR2925191B1 FR0708737A FR0708737A FR2925191B1 FR 2925191 B1 FR2925191 B1 FR 2925191B1 FR 0708737 A FR0708737 A FR 0708737A FR 0708737 A FR0708737 A FR 0708737A FR 2925191 B1 FR2925191 B1 FR 2925191B1
Authority
FR
France
Prior art keywords
resources
digital processing
processing architecture
multiple supervised
integrity digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0708737A
Other languages
English (en)
Other versions
FR2925191A1 (fr
Inventor
Tarik Aegerter
Patrice Toillon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR0708737A priority Critical patent/FR2925191B1/fr
Priority to US12/333,541 priority patent/US20090193229A1/en
Publication of FR2925191A1 publication Critical patent/FR2925191A1/fr
Application granted granted Critical
Publication of FR2925191B1 publication Critical patent/FR2925191B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845—Systems in which the redundancy can be transformed in increased performance

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
FR0708737A 2007-12-14 2007-12-14 Architecture de traitement numerique a haute integrite a multiples ressources supervisees Active FR2925191B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0708737A FR2925191B1 (fr) 2007-12-14 2007-12-14 Architecture de traitement numerique a haute integrite a multiples ressources supervisees
US12/333,541 US20090193229A1 (en) 2007-12-14 2008-12-12 High-integrity computation architecture with multiple supervised resources

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0708737A FR2925191B1 (fr) 2007-12-14 2007-12-14 Architecture de traitement numerique a haute integrite a multiples ressources supervisees

Publications (2)

Publication Number Publication Date
FR2925191A1 FR2925191A1 (fr) 2009-06-19
FR2925191B1 true FR2925191B1 (fr) 2010-03-05

Family

ID=39563499

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0708737A Active FR2925191B1 (fr) 2007-12-14 2007-12-14 Architecture de traitement numerique a haute integrite a multiples ressources supervisees

Country Status (2)

Country Link
US (1) US20090193229A1 (fr)
FR (1) FR2925191B1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2914519B1 (fr) * 2007-03-26 2009-06-12 Airbus France Sas Procede de controle d'integrite des donnees dans un reseau afdx.
FR2943036B1 (fr) * 2009-03-11 2011-04-15 Airbus France Systeme distribue de commande de vol implemente selon une architecture avionique modulaire integree.
JP5699057B2 (ja) * 2011-08-24 2015-04-08 株式会社日立製作所 プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス
US9400722B2 (en) * 2011-11-15 2016-07-26 Ge Aviation Systems Llc Method of providing high integrity processing
BR112016014108A2 (pt) * 2013-12-19 2017-08-08 Thales Canada Inc Sistema e método para gerenciamento de uma pluralidade de funções críticas em uma aeronave
WO2016087175A1 (fr) * 2014-12-01 2016-06-09 Continental Teves Ag & Co. Ohg Système de calcul pour un système de véhicule automobile
US9734006B2 (en) * 2015-09-18 2017-08-15 Nxp Usa, Inc. System and method for error detection in a critical system
FR3052890B1 (fr) 2016-06-21 2018-07-13 Thales Sa Procede de reception garantie de signaux communs dans un systeme avionique comportant une pluralite de calculateurs electroniques
US10599513B2 (en) 2017-11-21 2020-03-24 The Boeing Company Message synchronization system
US10528077B2 (en) 2017-11-21 2020-01-07 The Boeing Company Instruction processing alignment system

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5295258A (en) * 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
FR2686991A1 (fr) * 1992-02-05 1993-07-30 Sextant Avionique Procede, systeme et processeur de communication entre une pluralite de sous-ensembles d'un equipement.
FR2737029B1 (fr) * 1995-07-19 1997-09-26 Sextant Avionique Dispositif d'interface entre un calculateur a architecture redondante et un moyen de communication
KR100234504B1 (ko) * 1995-09-18 1999-12-15 포만 제프리 엘 선택된 고장에 대한 고장정보를 포착하는 집적회로의 테스트 방법 및 내장된 자기 테스트 장치
DE19809089A1 (de) * 1998-02-25 1999-08-26 Siemens Ag Synchronisations- und/oder Datenaustauschverfahren für sichere, hochverfügbare Rechner und hierzu geeignete Einrichtung
FR2797964B1 (fr) * 1999-08-23 2002-03-29 Thomson Csf Sextant Dispositif de controle securise de commutation de donnees
US6543016B1 (en) * 1999-11-04 2003-04-01 Agere Systems Inc. Testing content-addressable memories
DE10040389A1 (de) * 2000-08-18 2002-03-07 Infineon Technologies Ag Hochgeschwindigkeitsprozessor
JP3537087B2 (ja) * 2000-09-29 2004-06-14 Ｎｅｃエレクトロニクス株式会社 半導体装置及び半導体装置の検査方法
FR2819598B1 (fr) * 2001-01-16 2003-04-11 Thomson Csf Dispositif de synchronisation tolerant aux pannes pour reseau informatique temps reel
US7065672B2 (en) * 2001-03-28 2006-06-20 Stratus Technologies Bermuda Ltd. Apparatus and methods for fault-tolerant computing using a switching fabric
US7194556B2 (en) * 2001-03-30 2007-03-20 Intel Corporation Method and apparatus for high accuracy distributed time synchronization using processor tick counters
GB2377024A (en) * 2001-06-29 2002-12-31 Motorola Inc Fault tolerant measurment data outputting system
US20040122846A1 (en) * 2002-12-19 2004-06-24 Ibm Corporation Fact verification system
JP4155088B2 (ja) * 2003-04-18 2008-09-24 日本電気株式会社 情報処理装置
US8799706B2 (en) * 2004-03-30 2014-08-05 Hewlett-Packard Development Company, L.P. Method and system of exchanging information between processors
GB0411054D0 (en) * 2004-05-18 2004-06-23 Ricardo Uk Ltd Fault tolerant data processing
JP4168403B2 (ja) * 2004-12-21 2008-10-22 日本電気株式会社 フォールトトレラントシステム、これで用いる制御装置、アクセス制御方法、及び制御プログラム
US8595557B2 (en) * 2005-02-23 2013-11-26 International Business Machines Corporation Method and apparatus for verifying memory testing software
US8826288B2 (en) * 2005-04-19 2014-09-02 Hewlett-Packard Development Company, L.P. Computing with both lock-step and free-step processor modes

Also Published As

Publication number Publication date
FR2925191A1 (fr) 2009-06-19
US20090193229A1 (en) 2009-07-30

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