FR2897174B1 - Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur - Google Patents

Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur

Info

Publication number
FR2897174B1
FR2897174B1 FR0601091A FR0601091A FR2897174B1 FR 2897174 B1 FR2897174 B1 FR 2897174B1 FR 0601091 A FR0601091 A FR 0601091A FR 0601091 A FR0601091 A FR 0601091A FR 2897174 B1 FR2897174 B1 FR 2897174B1
Authority
FR
France
Prior art keywords
processor
debugging interface
interface controlled
unit
integrated debugging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0601091A
Other languages
English (en)
Other versions
FR2897174A1 (fr
Inventor
Renaud Ayrignac
Xavier Robert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0601091A priority Critical patent/FR2897174B1/fr
Priority to US11/671,661 priority patent/US7689864B2/en
Publication of FR2897174A1 publication Critical patent/FR2897174A1/fr
Application granted granted Critical
Publication of FR2897174B1 publication Critical patent/FR2897174B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3656—Software debugging using additional hardware using a specific debug interface

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
FR0601091A 2006-02-08 2006-02-08 Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur Expired - Fee Related FR2897174B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0601091A FR2897174B1 (fr) 2006-02-08 2006-02-08 Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur
US11/671,661 US7689864B2 (en) 2006-02-08 2007-02-06 Processor comprising an integrated debugging interface controlled by the processing unit of the processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0601091A FR2897174B1 (fr) 2006-02-08 2006-02-08 Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur

Publications (2)

Publication Number Publication Date
FR2897174A1 FR2897174A1 (fr) 2007-08-10
FR2897174B1 true FR2897174B1 (fr) 2008-04-18

Family

ID=37019049

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0601091A Expired - Fee Related FR2897174B1 (fr) 2006-02-08 2006-02-08 Processeur comportant une interface de debogage integree controlee par l'unite de traitement du processeur

Country Status (2)

Country Link
US (1) US7689864B2 (fr)
FR (1) FR2897174B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150019775A1 (en) * 2013-03-14 2015-01-15 Microchip Technology Incorporated Single Wire Programming and Debugging Interface
CN117056028B (zh) * 2023-09-25 2024-01-09 之江实验室 机器人仿真平台搭建方法、装置、计算机设备和存储介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530804A (en) * 1994-05-16 1996-06-25 Motorola, Inc. Superscalar processor with plural pipelined execution units each unit selectively having both normal and debug modes
US6668339B1 (en) * 1999-07-28 2003-12-23 Mitsubishi Denki Kabushiki Kaisha Microprocessor having a debug interruption function
US7793261B1 (en) * 1999-10-01 2010-09-07 Stmicroelectronics Limited Interface for transferring debug information
US6367032B1 (en) * 1999-10-21 2002-04-02 Sony Corporation Of Japan Method and system for debugging a microprocessor core

Also Published As

Publication number Publication date
US20070220331A1 (en) 2007-09-20
FR2897174A1 (fr) 2007-08-10
US7689864B2 (en) 2010-03-30

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20131031