FR2892838B1 - Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire - Google Patents
Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoireInfo
- Publication number
- FR2892838B1 FR2892838B1 FR0511043A FR0511043A FR2892838B1 FR 2892838 B1 FR2892838 B1 FR 2892838B1 FR 0511043 A FR0511043 A FR 0511043A FR 0511043 A FR0511043 A FR 0511043A FR 2892838 B1 FR2892838 B1 FR 2892838B1
- Authority
- FR
- France
- Prior art keywords
- processor
- random access
- access memory
- flow manager
- specialized flow
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- E—FIXED CONSTRUCTIONS
- E04—BUILDING
- E04F—FINISHING WORK ON BUILDINGS, e.g. STAIRS, FLOORS
- E04F21/00—Implements for finishing work on buildings
- E04F21/18—Implements for finishing work on buildings for setting wall or ceiling slabs or plates
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
-
- E—FIXED CONSTRUCTIONS
- E04—BUILDING
- E04F—FINISHING WORK ON BUILDINGS, e.g. STAIRS, FLOORS
- E04F21/00—Implements for finishing work on buildings
- E04F21/18—Implements for finishing work on buildings for setting wall or ceiling slabs or plates
- E04F21/1805—Ceiling panel lifting devices
- E04F21/1811—Ceiling panel lifting devices with hand-driven crank systems, e.g. rope, cable or chain winding or rack-and-pinion mechanisms
Landscapes
- Engineering & Computer Science (AREA)
- Architecture (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- Civil Engineering (AREA)
- Structural Engineering (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0511043A FR2892838B1 (fr) | 2005-10-28 | 2005-10-28 | Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire |
EP06830976A EP1960889A1 (fr) | 2005-10-28 | 2006-10-20 | Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire |
PCT/FR2006/002357 WO2007048907A1 (fr) | 2005-10-28 | 2006-10-20 | Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire |
US12/154,819 US20080301361A1 (en) | 2005-10-28 | 2008-05-28 | Dedicated flow manager between the processor and the random access memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0511043A FR2892838B1 (fr) | 2005-10-28 | 2005-10-28 | Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2892838A1 FR2892838A1 (fr) | 2007-05-04 |
FR2892838B1 true FR2892838B1 (fr) | 2008-04-25 |
Family
ID=37037032
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0511043A Expired - Fee Related FR2892838B1 (fr) | 2005-10-28 | 2005-10-28 | Gestionnaire specialise de flux entre le processeur et la memoire a acces aleatoire |
Country Status (4)
Country | Link |
---|---|
US (1) | US20080301361A1 (fr) |
EP (1) | EP1960889A1 (fr) |
FR (1) | FR2892838B1 (fr) |
WO (1) | WO2007048907A1 (fr) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4631659A (en) * | 1984-03-08 | 1986-12-23 | Texas Instruments Incorporated | Memory interface with automatic delay state |
US5274795A (en) * | 1989-08-18 | 1993-12-28 | Schlumberger Technology Corporation | Peripheral I/O bus and programmable bus interface for computer data acquisition |
SE0000533D0 (sv) * | 2000-02-18 | 2000-02-18 | Ericsson Telefon Ab L M | Static cache |
US6643740B1 (en) * | 2001-07-30 | 2003-11-04 | Lsi Logic Corporation | Random replacement generator for a cache circuit |
US7502928B2 (en) * | 2004-11-12 | 2009-03-10 | Sony Computer Entertainment Inc. | Methods and apparatus for secure data processing and transmission |
KR100745369B1 (ko) * | 2005-12-22 | 2007-08-02 | 삼성전자주식회사 | 포트상태 시그날링 기능을 갖는 멀티패쓰 억세스블 반도체메모리 장치 |
-
2005
- 2005-10-28 FR FR0511043A patent/FR2892838B1/fr not_active Expired - Fee Related
-
2006
- 2006-10-20 EP EP06830976A patent/EP1960889A1/fr not_active Withdrawn
- 2006-10-20 WO PCT/FR2006/002357 patent/WO2007048907A1/fr active Application Filing
-
2008
- 2008-05-28 US US12/154,819 patent/US20080301361A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2007048907A1 (fr) | 2007-05-03 |
US20080301361A1 (en) | 2008-12-04 |
EP1960889A1 (fr) | 2008-08-27 |
FR2892838A1 (fr) | 2007-05-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TP | Transmission of property | ||
ST | Notification of lapse |
Effective date: 20100630 |
|
CA | Change of address |
Effective date: 20130329 |