FR2879020B1 - METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL - Google Patents

METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL

Info

Publication number
FR2879020B1
FR2879020B1 FR0413061A FR0413061A FR2879020B1 FR 2879020 B1 FR2879020 B1 FR 2879020B1 FR 0413061 A FR0413061 A FR 0413061A FR 0413061 A FR0413061 A FR 0413061A FR 2879020 B1 FR2879020 B1 FR 2879020B1
Authority
FR
France
Prior art keywords
thin film
zones
mask
patterns
free zones
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0413061A
Other languages
French (fr)
Other versions
FR2879020A1 (en
Inventor
Maud Vinet
Jean Charles Barbe
Bernard Previtali
Thierry Poiroux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0413061A priority Critical patent/FR2879020B1/en
Priority to AT05354040T priority patent/ATE390709T1/en
Priority to DE602005005611T priority patent/DE602005005611T2/en
Priority to EP05354040A priority patent/EP1670053B1/en
Priority to US11/291,918 priority patent/US7473588B2/en
Publication of FR2879020A1 publication Critical patent/FR2879020A1/en
Application granted granted Critical
Publication of FR2879020B1 publication Critical patent/FR2879020B1/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Patterns (1a) formed on thin film (1) are insulated by formation, on thin film, of a mask (7) defining, in the thin film, free zones and zones (4a, 5a) covered by the mask designed to substantially form the patterns; selective formation of an additional layer formed by an oxide of a second semi-conducting material, at the level of the free zones of the thin film; oxidization of the free zones of the thin film; and removal of the mask. Insulation of patterns formed in thin film, made of a first oxidizable semi-conducting material, with a predetermined thickness of = 20 nm and arranged on a support, successively involves formation, on the thin film, of mask defining, in the thin film, free zones and zones covered by the mask designed to substantially form the patterns; selective formation of additional layer formed by oxide of second semi-conducting material, at the level of the free zones of the thin film; oxidization of the free zones of the thin film; and removal of the mask to release the thin film patterned in the form of patterns insulated by oxidized zones.
FR0413061A 2004-12-08 2004-12-08 METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL Expired - Fee Related FR2879020B1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0413061A FR2879020B1 (en) 2004-12-08 2004-12-08 METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL
AT05354040T ATE390709T1 (en) 2004-12-08 2005-11-28 METHOD FOR ISOLATING PARTIAL AREAS IN A THIN FILM OF AN OXIDIZABLE SEMICONDUCTOR MATERIAL
DE602005005611T DE602005005611T2 (en) 2004-12-08 2005-11-28 Method for insulating partial areas in a thin film of an oxidizable semiconductor material
EP05354040A EP1670053B1 (en) 2004-12-08 2005-11-28 Isolation process of parts of a thin film in an oxydizable semiconductor material
US11/291,918 US7473588B2 (en) 2004-12-08 2005-12-02 Method for insulating patterns formed in a thin film of oxidizable semi-conducting material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0413061A FR2879020B1 (en) 2004-12-08 2004-12-08 METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL

Publications (2)

Publication Number Publication Date
FR2879020A1 FR2879020A1 (en) 2006-06-09
FR2879020B1 true FR2879020B1 (en) 2007-05-04

Family

ID=34951323

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0413061A Expired - Fee Related FR2879020B1 (en) 2004-12-08 2004-12-08 METHOD OF ISOLATING PATTERNS FORMED IN THIN FILM OF OXYDABLE SEMICONDUCTOR MATERIAL

Country Status (5)

Country Link
US (1) US7473588B2 (en)
EP (1) EP1670053B1 (en)
AT (1) ATE390709T1 (en)
DE (1) DE602005005611T2 (en)
FR (1) FR2879020B1 (en)

Family Cites Families (44)

* Cited by examiner, † Cited by third party
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US3341753A (en) * 1964-10-21 1967-09-12 Texas Instruments Inc Metallic contacts for semiconductor devices
US4407696A (en) * 1982-12-27 1983-10-04 Mostek Corporation Fabrication of isolation oxidation for MOS circuit
US4819040A (en) * 1986-05-02 1989-04-04 Motorola, Inc. Epitaxial CMOS by oxygen implantation
US5149669A (en) * 1987-03-06 1992-09-22 Seiko Instruments Inc. Method of forming an isolation region in a semiconductor device
US4764248A (en) * 1987-04-13 1988-08-16 Cypress Semiconductor Corporation Rapid thermal nitridized oxide locos process
US4927780A (en) * 1989-10-02 1990-05-22 Motorola, Inc. Encapsulation method for localized oxidation of silicon
US5120675A (en) * 1990-06-01 1992-06-09 Texas Instruments Incorporated Method for forming a trench within a semiconductor layer of material
US5175123A (en) * 1990-11-13 1992-12-29 Motorola, Inc. High-pressure polysilicon encapsulated localized oxidation of silicon
KR960008518B1 (en) * 1991-10-02 1996-06-26 Samsung Electronics Co Ltd Manufacturing method and apparatus of semiconductor device
US5308445A (en) * 1991-10-23 1994-05-03 Rohm Co., Ltd. Method of manufacturing a semiconductor device having a semiconductor growth layer completely insulated from a substrate
KR940003070A (en) * 1992-07-10 1994-02-19 문정환 Isolation Method between Unit Devices of Semiconductor Device
KR960011861B1 (en) * 1993-06-10 1996-09-03 삼성전자 주식회사 Semiconductor device isolation method
US5393692A (en) * 1993-07-28 1995-02-28 Taiwan Semiconductor Manufacturing Company Recessed side-wall poly plugged local oxidation
DE69434736D1 (en) * 1993-08-31 2006-06-22 St Microelectronics Inc Isolation structure and method of manufacture
KR970003731B1 (en) * 1993-10-14 1997-03-21 엘지반도체 주식회사 Method of forming the isolation elements on the semiconductor device
US6083810A (en) * 1993-11-15 2000-07-04 Lucent Technologies Integrated circuit fabrication process
JPH07201840A (en) * 1993-12-28 1995-08-04 Fujitsu Ltd Manufacturing for semiconductor device
US6127242A (en) * 1994-02-10 2000-10-03 Micron Technology, Inc. Method for semiconductor device isolation using oxygen and nitrogen ion implantations to reduce lateral encroachment
US5374585A (en) * 1994-05-09 1994-12-20 Motorola, Inc. Process for forming field isolation
US5432118A (en) * 1994-06-28 1995-07-11 Motorola, Inc. Process for forming field isolation
JP3422593B2 (en) * 1995-04-07 2003-06-30 三菱電機株式会社 Method for manufacturing semiconductor device
US5607543A (en) * 1995-04-28 1997-03-04 Lucent Technologies Inc. Integrated circuit etching
US5658381A (en) * 1995-05-11 1997-08-19 Micron Technology, Inc. Method to form hemispherical grain (HSG) silicon by implant seeding followed by vacuum anneal
US5629230A (en) * 1995-08-01 1997-05-13 Micron Technology, Inc. Semiconductor processing method of forming field oxide regions on a semiconductor substrate utilizing a laterally outward projecting foot portion
US6967369B1 (en) * 1995-09-20 2005-11-22 Micron Technology, Inc. Semiconductor memory circuitry
US6043562A (en) * 1996-01-26 2000-03-28 Micron Technology, Inc. Digit line architecture for dynamic memory
FR2749977B1 (en) * 1996-06-14 1998-10-09 Commissariat Energie Atomique QUANTUM WELL MOS TRANSISTOR AND METHODS OF MANUFACTURE THEREOF
US5902128A (en) * 1996-10-17 1999-05-11 Micron Technology, Inc. Process to improve the flow of oxide during field oxidation by fluorine doping
US5966621A (en) * 1996-11-14 1999-10-12 Micron Technology, Inc. Semiconductor processing method of forming field isolation oxide relative to a semiconductor substrate
US5894059A (en) * 1997-05-30 1999-04-13 Chartered Semiconductor Manufacturing Company Ltd. Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect
US5880004A (en) * 1997-06-10 1999-03-09 Winbond Electronics Corp. Trench isolation process
US6306727B1 (en) * 1997-08-18 2001-10-23 Micron Technology, Inc. Advanced isolation process for large memory arrays
US6090685A (en) * 1997-08-22 2000-07-18 Micron Technology Inc. Method of forming a LOCOS trench isolation structure
US5940720A (en) * 1997-08-29 1999-08-17 Samsung Electronics Co., Ltd. Methods of forming oxide isolation regions for integrated circuits substrates using mask and spacer
US6074933A (en) * 1997-09-05 2000-06-13 Lucent Technologies Inc. Integrated circuit fabrication
KR100247939B1 (en) * 1997-09-08 2000-03-15 윤종용 Semiconductor element isolating method using padoxidation by cvd
US6063690A (en) * 1997-12-29 2000-05-16 Utmc Microelectronics Systems Inc. Method for making recessed field oxide for radiation hardened microelectronics
JP3514178B2 (en) * 1998-09-16 2004-03-31 株式会社デンソー Method for manufacturing semiconductor device
US6306726B1 (en) * 1999-08-30 2001-10-23 Micron Technology, Inc. Method of forming field oxide
US6261926B1 (en) * 2000-05-11 2001-07-17 Mosel Vitelic, Inc. Method for fabricating field oxide
US6566680B1 (en) * 2001-01-30 2003-05-20 Advanced Micro Devices, Inc. Semiconductor-on-insulator (SOI) tunneling junction transistor
KR100481073B1 (en) * 2002-07-09 2005-04-07 삼성전자주식회사 method for forming a thin film, and method for a gate electrode and a transistor using the same
DE10248723A1 (en) * 2002-10-18 2004-05-06 Infineon Technologies Ag Integrated circuit arrangement with capacitors and preferably planar transistors and manufacturing processes
US20060091493A1 (en) * 2004-11-01 2006-05-04 Silicon-Based Technology Corp. LOCOS Schottky barrier contact structure and its manufacturing method

Also Published As

Publication number Publication date
EP1670053A1 (en) 2006-06-14
EP1670053B1 (en) 2008-03-26
DE602005005611D1 (en) 2008-05-08
US20060121653A1 (en) 2006-06-08
ATE390709T1 (en) 2008-04-15
US7473588B2 (en) 2009-01-06
FR2879020A1 (en) 2006-06-09
DE602005005611T2 (en) 2009-04-30

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Effective date: 20160831