FR2839365A1 - Equipment for measuring excitation current in vehicle generator, comprises transistors in excitation and reference circuits, comparator which controls counter and current in reference circuit - Google Patents

Abstract

A first transistor (T1) is connected into the generator excitation winding (L) circuit (1) and a second transistor (T2) is connected in series with a reference current generator (6) in a reference circuit (2). Signals from two nodes (K1,K2) in the excitation and reference circuits are compared (7) and the output controls a counter/convertor (3,4) and the reference generator to indicate the excitation current at comparator equilibrium. An Independent claim is also included for a method for measuring the excitation current in a vehicle generator which uses a reference circuit, comparator and counter which controls the reference current.

Description

multi-parameter and / or parallel analysis.

  Field of the invention The present invention relates to a device for measuring the excitation current in the excitation circuit of a generator, in particular

ment of a vehicle generator.

  The invention also relates to a method for measuring the excitation current in the excitation circuit of a generator, in particular

ment of a vehicle generator.

  The polar claw generators usually used for supplying power to on-board networks of vehicles such as carry a generator regulator with a switching transistor (power stage transistor). Depending on the generator output voltage, this transistor switches according to a predetermined working ratio.

ne (DF signal).

  The supply of current through the power transis tor in the event of a short circuit or overcurrent is subject to a fixed limit value. From this value, the power stage is

cuts or is regulated in return.

  FIGS. 1a, 1b each show the excitation current of a generator regulator comprising an excitation winding L,

  a freewheeling diode D1 and a power stage transistor T1.

  Each excitation circuit includes a circuit determining the excitation current. This circuit includes a resistor R plugged into the excitation circuit and an amplifier 8. The voltage drop

  on resistance R thus constitutes a measurement of the excitation current.

  s To influence the excitation current as little as possible, choose weak resistors R, which gives only a very weak voltage signal whose amplification is complicated and which must also be converted by analog conversion / numeric for

digital applications.

  Aim of the invention The aim of the present invention is to simplify the measurement of the

excitation current.

  Description of the invention and advantages To this end, the invention relates to a device of the type defined above, characterized by - a first transistor in the excitation circuit for controlling the excitation current, - a second transistor in a reference path, this transistor being technically practically identical to the first transistor, - a comparator, one input of which is connected to a nccud of the excitation circuit and the other input of which is connected to a node of a reference path, - an up / down counter connected to the output of the comparator and which, depending on the output signal of the up or down comparator and - a controlled current source installed in the reference path, this source being controlled according to the counting state of the

to up / down counter.

  The invention also relates to a method of the type defined above, characterized by the following steps: - comparison of a node voltage in the excitation circuit to a node voltage in a reference path using a comparator, - modification of the counting direction of an up / down counter according to the state of the comparator output signal, - control of a current source in the reference path following the counting state of the counter / Down counter and transmission of the counting state to a processing unit as a measurement of the current flowing in the excitation circuit The main idea of the invention consists in exploiting the voltage drop on the switching transistor of the excitation circuit to measure the excitation current. This gives beautiful measurement voltages

  2s higher than in the state of the art.

  As the resistance of the switching transistor is in fact highly dependent on the temperature, in particular due to the inherent temperature rise of the transistor, linearity faults are encountered in the intensity / voltage curve of the transistor and these linearity faults

  must be compensated appropriately.

  In other words, there is a circuit for measuring the excitation current comprising a first transistor in the excitation circuit and a second transistor in a reference path. These technically essentially identical wind transistors. A comparator is also provided, one input of which is connected to a node of the excitation circuit and the other input to a node of the reference path. A counter / upcounter is connected to the comparator output and depending on the signal output it counts or counts down. The circuit includes

  in addition to a controlled current source installed in the refe-

  and which, depending on the counting state of the up / down counter, applies a path to the reference current. The counting state of the up / down counter is thus a measure of the current flowing in the

s excitation circuit.

  According to a preferential embodiment of the invention, the

  two transistors wind MOSFET transistors. The comparative entries

  teur wind preferably connected each time to the source of the transistors.

  The two transistors are preferably mono integration

  to lithic. The reference transistor can however be reduced by a coefficient

  cient (m) predetermined with respect to the power stage transistor

of the excitation circuit.

  The two wind transistors preferably connected to each other by their drain and their door and they wind in direct thermal contact to avoid temperature differences. Thanks to identical electrical and thermal behaviors of the reference transistor and the power stage transistor, we compensate for the thermal linearity faults mentioned above if the current density in the two transistors is identical. o The comparator compares the voltage across the nodes and always changes the switching state of its output signal if the sign

algebraic of the tension changes.

  According to a preferential embodiment of the invention, the comparator switches with its output signal, the counting direction of a 2s up / down counter, binary at n bits. The up / down counter preferably counts at each franc a clock signal as a function of the comparator output signal, from one level up or towards the teas. The binary counting state of the up / down counter is preferably used to control the current source which supplies a current proportional to

  the counting state through the reference transistor.

  The counting status of the digital up / down counter is preferably transmitted by a digital interface to a

  control which transforms into an appropriate current value.

  Drawings 3s The present invention will be described below in more detail with the aid of the annexed drawings in which: FIGS. 1a, 1b are measurement circuits for exploiting the excitation current according to the state of the art,

  FIG. 2 is a circuit for measuring the corresponding excitation current;

  according to an embodiment of the invention, - Figure 3 is a circuit for measuring the excitation current according to another embodiment of the invention, - Figures 4a, 4b show the curve of the currents crossing the tran - sistors.

  For the description of Figures la, lb we will refer to

preamble to the description.

Description of embodiments

  o Figure 2 shows a circuit for measuring the excitation current in the excitation circuit 1 of a generator regulator. The excitation circuit 1 comprises a winding of ex: citation L with a freewheeling diode D1 as well as a power stage transistor T1 constituted by a MOS transistor with channel (n). The current IT! passing through the excitation circuit and thus the generator voltage is regulated by a signal DF applied to the gate of the transistor T1. In this circuit, the excitation current is measured directly on the voltage drop across the terminals of the transistor T1 in order to be amplified by the amplifier 8. As the resistance of the transistor T1 depends on the temperature, the proper heating of the transistor T1 generates linearity faults for complicated compensation. FIG. 3 shows a circuit which compensates for the temperature function of the transistor of the power stage T1. This circuit includes an excitation circuit 1 and in parallel to it a reference path s 2. This path comprises a reference transistor T2 of construction are substantially identical to that of the transistor T1 but which is reduced

  a predetermined coefficient (m) with respect to transistor T1.

  Transistors T1, T2 wind electrically connected by their drain and gate terminal and wind in direct thermal contact to have the same temperature distribution. Transistors T1, T2 pref wind

rence of monolithic integration.

  Due to the identical construction and the thermal compensation of the transistors T1, T2, one has an electrical behavior es

substantially identical.

  The circuit further comprises a comparator 7, the wind inputs of which are connected each time to a source connection of the transistors T1, T2 and which compares the voltage on the terminals K1, K2. The output signal of comparator 7 changes state when the algebraic sign of the input voltage changes. Comparator 7 thus detects whether the density of

  current in one of the transistors T1, T2 becomes larger or smaller

  tite that that in the other transistor T2, T1.

  The comparator 7 is connected to a binary up / down counter 3 with n bits and it switches by its output signal the counting direction thereof. When the voltage at the nodes at the comparator input changes, the counter 3 counts according to the counting state of the comparator 7

  in the direction of counting or counting down.

  The digital counting state of the up / down counter 3

  o is used after an analog conversion by an analog converter

  / digital DA, 4 to control a current source 6 in the

  reference path 2. This current source provides a corresponding current

  laying in the counting state in the reference transistor T2. In modi-

  relying on the current IT2 passing through the reference transistor T2, the

nccud K2 voltage.

  The counting state finally stabilizes on a certain value if the voltages of the nodes K1, K2 and thus the current densities

  transistors T1, T2 are identical.

  Taking into account the above considerations, we can re

  o reduce to a very low level the measurement faults produced for the

  termination of the e: gcitation ITI current: as indicated, the transistor T1 is controlled in cadence by the signal DF to control the excitation current. The rate control of the switching transistor T1 leads to an IT excitation current curve! increasing during the connection time and at a falling current curve IT] during the cut-off time. However, we only measure during the connection time. This may result in some measurement error

according to the instant of the measurement.

  Preferably, the counting state of up / down counter 3 is recorded in the middle of the connection duration. Due to the very short switching times compared to the time constant of the excitation field, the evolution of the current over time

  of connection and the cut-off time is practically linear, that is to say-

  say that the intensity in the middle of the connection duration corresponds very

  ss exactly the average value of the current ITI.

  The operation of the circuit of FIG. 3 will be described at

  [using the example presented aug: Figures 4a, 4b.

  Figure 4a shows a current curve 9 of the transistor

  of the power stage T1 taken by way of example.

  Figure 4b further shows the reference current IT2 passing through the reference path 2. It is assumed that the current density in the reference transistor T2 at [instant t0 is lower than that

  in transistor T1. The voltage across transistor T2 is thus in-

  lower than that across transistor T1 where the voltage of node K2 is

  greater than that of node K1. The comparator output signal 7 mo-

  defines the counting direction of the up / down counter 3 to count from the down counting mode to the counting mode. The up / down counter 3 increases its counting state during the next clock signal (clock) by a value and correspondingly increases the current Iq supplied by

the current source controls 6.

  Then, the current passing through the transistor T2 increases and s the voltage DS at the terminals of the transistor decreases so that the voltage of the node K2 decreases. The output signal of comparator 7 changes state and

  causes the up / down counter 3 to count down again.

  At the instant tl, the excitation current IT! drops sharply and the up / down counter 3 counts down until the current density in the reference transistor T2 again falls below that of the switching transistor T1. The current IT? applied by the controlled current source 6 varies again to stabilize on the

ITT charging current.

  At the output of the up / down counter 3 at n bits, the excitation current IT) is generated as a binary resolution value at n bits and can be supplied directly to a control device, for example by

  a digital interface. The IT excitation current! crossing the transis-

  tor T1 is given by the following formula: IT! = m * counting state * AI

NOMENCLATURE

  1 excitation circuit s 2 reference path 3 up / down counter 4 digital / analog converter D / A bit word word 6 current source command lo 7 comparator K1, K2 circuit node L excitation winding D 1 diode IT freewheel! excitation current T1, T2 transistors

Claims (5)

  1) Device for measuring the excitation current (ITI) in the excitation circuit (l) of a generator, in particular of a vehicle generator, characterized by   s - a first transistor (Tl) in the excitation circuit (l) for com-   order the excitation current (ITI),   - a second transistor (T2) in a reference path (2), this transis-   tor being technically practically identical to the first transistor (Tl), 0 - a comparator (7), one input of which is connected to a nccud (K l) of the excitation circuit (l) and the other input of which is connected to a node (K2) of a reference path (2), - an up / down counter (3) connected to the output of the comparator (7) and which, depending on the output signal of the comparator (7) counts or counts down and - a controlled current source (6) installed in the reference path (2), this source being controlled according to the counting state of the up / down counter (3).   2) Device according to claim 1, characterized in that the comparator input (7) is connected to a nccud (Kl) between the first transistor (T1) and the excitation winding (L) and the second comparator input (7) is connected to a nccud (K2) between the second transistor (T2)   and the controlled current source (6).   3) Device according to claim 1 or 2, characterized in that   the two transistors (T1, T2) sell integrated monolithic transistors.   4) Device according to claim 1, characterized in that   the up / down counter (3) is a digital counter with n bits.   3s 5) Device according to claim 1, characterized by   a digital interface transmitting the counting state of the account   up / down counter (3) to a control device.   6) Device according to claim 1, characterized in that the first and the second transistor (T1, T2) wind MOS AC transistors (n) s 7) Device according to claim 1, characterized in that   the transistors (T1, T2) are controlled by the same clock signal (DF).   S) Method for measuring the excitation current (ITI) in the excitation circuit (1) of a generator, in particular of a vehicle generator, characterized by the following steps: - comparison of a node voltage in the excitation circuit (1) has a node voltage in a reference path (2) using a comparator (7), - modification of the counting direction of an up / down counter (3) l state of the comparator output signal (7), - control of a current source (6) in the reference path (2) according to the counting state of the up / down counter (3) and o - transmission of the counting state to a processing unit like