FR2831288B1 - Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire - Google Patents

Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire

Info

Publication number
FR2831288B1
FR2831288B1 FR0113412A FR0113412A FR2831288B1 FR 2831288 B1 FR2831288 B1 FR 2831288B1 FR 0113412 A FR0113412 A FR 0113412A FR 0113412 A FR0113412 A FR 0113412A FR 2831288 B1 FR2831288 B1 FR 2831288B1
Authority
FR
France
Prior art keywords
registers
microprocessor
instructions
memory locations
exchanging values
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0113412A
Other languages
English (en)
Other versions
FR2831288A1 (fr
Inventor
Franck Roche
Andre Colomb
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0113412A priority Critical patent/FR2831288B1/fr
Priority to US10/273,417 priority patent/US7096346B2/en
Publication of FR2831288A1 publication Critical patent/FR2831288A1/fr
Application granted granted Critical
Publication of FR2831288B1 publication Critical patent/FR2831288B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
FR0113412A 2001-10-18 2001-10-18 Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire Expired - Fee Related FR2831288B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0113412A FR2831288B1 (fr) 2001-10-18 2001-10-18 Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire
US10/273,417 US7096346B2 (en) 2001-10-18 2002-10-17 Microprocessor having instructions for exchanging values between two registers or two memory locations

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0113412A FR2831288B1 (fr) 2001-10-18 2001-10-18 Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire

Publications (2)

Publication Number Publication Date
FR2831288A1 FR2831288A1 (fr) 2003-04-25
FR2831288B1 true FR2831288B1 (fr) 2004-12-10

Family

ID=8868415

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0113412A Expired - Fee Related FR2831288B1 (fr) 2001-10-18 2001-10-18 Microprocesseur disposant d'instructions d'echange de valeurs entre deux registres ou deux emplacements memoire

Country Status (2)

Country Link
US (1) US7096346B2 (fr)
FR (1) FR2831288B1 (fr)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1421389A (fr) * 1964-10-02 1965-12-17 Constr Telephoniques Système de traitement de données simplifié
EP0072373B1 (fr) * 1981-08-19 1986-03-19 International Business Machines Corporation Microprocesseur
JPH09305401A (ja) * 1996-05-13 1997-11-28 Mitsubishi Electric Corp コンピュータ及びコンパイラ
US6145075A (en) * 1998-02-06 2000-11-07 Ip-First, L.L.C. Apparatus and method for executing a single-cycle exchange instruction to exchange contents of two locations in a register file

Also Published As

Publication number Publication date
US7096346B2 (en) 2006-08-22
FR2831288A1 (fr) 2003-04-25
US20030088749A1 (en) 2003-05-08

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20070629