FR2795235A1 - METHOD FOR PRODUCING DEVICES COMPRISING A CHIP ASSOCIATED WITH A CIRCUIT ELEMENT AND DEVICES OBTAINED - Google Patents

Abstract

The invention concerns a method for making electronic devices, each comprising at least a chip (2) electrically connected to at least a circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4). The invention is characterised in that it consists in producing at least part of the circuit element (20) on the protective substrate (4), the latter integrally forming part of the device produced. The chip (2) can be produced according to the silicon on insulator technology. The circuit element produced on the protective substrate can be an antenna (20) designed to form a communication interface with the or each chip (2) whereto it is connected. The invention also concerns the use of said method for producing means for identifying and/or tracking an object (30), the use of a protective substrate to produce at least part of at least a circuit element and a device using such a substrate.

Description

 DEVICE <B> PROCESS <B> OF DEVICES COMPRISING A </ B> <B> CHIP </ B> ASSOCIATED WITH <B> CIRCUIT ELEMENT <B> </ B> </ B> The present invention relates to a device comprising an integrated circuit in the form of a chip, associated with a component, for example a communication interface, to form an integrated whole.

More particularly, the invention makes it possible to produce modules composed of at least one chip and the associated component from so-called silicon on insulator technology. This technology makes it possible to obtain chips whose active silicon portion is very thin, which may be of the order of 10 microns or less. Because of the great thinness of the chips, it is necessary, according to this technology, to provide a protective substrate whose role is to maintain a set of chips during the various stages of their manufacture and to allow the handling of chips during their cutting and their postponement on a definitive support for which they are intended.

This technology for producing very thin chips on a protective substrate is described in particular in the patent document WO-A-9802921 in the name of the company KOPIN. The content of this document is known to those skilled in the art and the details of the various steps of making the chips and their protective substrate will not be repeated here for the sake of brevity.

The general characteristics of the products resulting from this technology will be recalled in the following with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing a portion of a wafer 12 derived from so-called silicon on insulator technology (in English SOI for "silicon on insulator"). The chips 2 are arranged in rows of rows on an insulating protective substrate 4, typically glass, which constitutes the body of the wafer 12. This insulating substrate 4 serves inter alia to facilitate the handling of the chips 2, which are flexible and fragile in nature. because of their thinness (of the order of 10 microns).

Each chip 2 is retained on the glass-protecting substrate 4 by adhesive pads 6. These adhesive pads 6 are constituted by small rectangular areas, turned at 45 relative to the sides of the chips 2 and placed on the respective corners of each chip, so that outside the periphery of the wafer 12 a pad 6 covers four united corners of four different chips.

FIG. 2 is a partial sectional view along the axis II-II 'of FIG. 1 which shows the structure of an assembly composed of a chip 2, adhesive pads 6 and the protective substrate, in this case the glass.

The chip 2 has towards one or more of these edges electrical connection pads 8 which connect the circuit made on the chip with the outside. Each connection pad is made by a boss 8, known more generally under the Anglo-Saxon term "bump". The bosses 8 of the chip 2 are protruding points from one or other of the faces 2a or 2b of the chip 2, allowing the necessary interconnections with a communication interface.

In the illustrated example, the bosses 8 are formed on the face 2a of the chip 2, which faces the protective glass substrate 4. However, the bosses 8 may also be formed on the face 2a of the chip facing the outside relative to the protective substrate 4.

Each boss 8 has a substantially ogival shape to ensure a good mechanical and electrical contact with a corresponding connection pad at its communication interface.

Typically, the thickness el of the adhesive pads 6 is sufficient so that the top of the bosses 8 is not in contact with the face 4a of the protective substrate 4 facing it.

It should be noted that the technology <B> soi </ B> currently makes it possible to make chips 2 whose overall thickness is of the order of 10 microns, or even substantially less. This dimension comprises on the one hand the thickness e2 of the entire layer forming the chip 2 and on the other hand the elevations e3 at the connection pads 8.

In the example shown in Figure 2, the thickness e2 of the layer of the chip 2 is of the order of 5 microns and the relief e3 bosses 8 is also of the order of 5 microns.

In accordance with conventional practices, the wafer is cut along the separation lines D of the individual chips in order to obtain, for each chip, an assembly 14 composed of the chip itself, the portion of the protective substrate 4 directly under the chip and the adhesive pad portions at the corners of the chip, retaining it to the protective substrate.

Then, the chip is transferred to its final support, which may be for example an electronic component box or a printed circuit board. Once the transfer is carried out, the protective substrate 4 is removed with the parts of the adhesive pads 6. The protective substrate 4, having then fulfilled its function, is then discarded.

The removal of the protective substrate 4 is a delicate operation, given the low mechanical strength of the silicon layer which constitutes the chip 2. The usual techniques used are cleavage, which is an operation of cutting around the adhesive pads 6 to release the chip 2, or the peeling of the substrate of the protective substrate 4, if the chip is sufficiently well retained on its transfer medium.

If the chip 2 is intended to be associated with another component, for example an antenna to achieve a contactless communication interface, it is necessary to provide this component on or near the support on which the chip is reported. Then, there is an interconnection between the chip and the component. This interconnection can be achieved by a direct contact between the chip and the component, or by means of current supply connecting them.

it can be seen that the operations for removing the protective substrate and for making certain components on the transfer support are difficult to carry out, that they require complex tools and are liable to damage the component, which leads to yield losses.

In view of these problems, the present invention proposes a method for manufacturing electronic devices, each comprising at least one chip electrically connected to at least one circuit element, the chip being in the form of a very thin layer associated with a protective substrate, characterized in that at least a portion of the circuit element is made on the protective substrate, the latter forming an integral part of the manufactured device.

Thus, the present invention makes it possible to efficiently and elegantly integrate an element which, in the state of the art, is considered as parasitic after having fulfilled its protective function during manufacture.

Moreover, since the substrate element associated with each chip is retained, the conventional method of removing the protective substrate is not used. However, this operation requires extensive tooling and processing time and entails risks of damage to the device during manufacture. Advantageously, the chip is made according to the silicon on insulator technology, making it possible to have an active layer of very great thinness.

In a preferred embodiment, the circuit element made on the protective substrate is an antenna intended to constitute a communication interface with the or each chip to which it is connected.

For each point of connection between the chip and a circuit element on the substrate, a contact pad may be produced respectively at the chip and at the circuit element, thus forming a pair of contact pads in contact with each other. to face.

In this case, each contact pad at the chip may be in the form of a boss. Preferably, each contact pad at the circuit element is in the form of a contact pad capable of fusing with the corresponding contact pad of the chip.

In one embodiment, the thin film is associated with the protective substrate by adhesive means which maintain a separation between the facing faces of the layer and the substrate. For the or each connection between the chip and the circuit element, a contact pad is then produced respectively on the chip and on the circuit element, the corresponding contact pads being substantially arranged facing each other and joining each other. or being slightly set back from each other in the state of rest before their connection.

Preferably, at least one connection is made between the chip and the circuit element on the substrate by soldering, possibly by applying a pressure which makes it possible to connect corresponding connection means of the chip and the circuit element formed on the substrate.

According to a preferred embodiment of the invention, the welding (s) is carried out by transmitting a welding energy through the thickness of the protective substrate.

The welding energy can come from a laser beam.

In this case, it can be transmitted by a plurality of optical paths, each directed to a respective connection to be made between the substrate and the chip.

Preferably, each optical path is materialized by at least one optical fiber.

According to one variant, it is also possible to perform the welding by thermocompression.

Preferably, the connections are made between each chip and its respective circuit element for a set of chips associated with the same protective substrate, and the protective substrate is then cut to form elementary modules composed of at least one chip and a portion of the protective substrate in the format of the or each chip forming the module.

Thus, one can integrate at least one module to an object. This module can then be affixed to a surface of the object.

 Optionally, at least the exposed face of the or each chip of the module and at least a portion of the surface of the object may be covered with a protective film. The present invention also relates to the use of an electronic device resulting from the method as described above as means for identifying and / or tracking an object associated with said device.

The present invention also relates to the use of a protective substrate normally intended to protect a very thin active layer forming chips according to so-called silicon on insulator technology for the production on said protective substrate of at least a part of at least an element intended to be connected to a corresponding chip.

The present invention also relates to an electronic device comprising at least one chip electrically connected to at least one circuit element, the chip being in the form of a very thin layer associated with a protective substrate, characterized in that at least a portion of the circuit element is formed on the protective substrate, the latter forming an integral part of the device.

The circuit element made on the protective substrate may be an antenna intended to constitute a communication interface with the or each chip to which it is connected.

Each point of connection between the chip and a circuit element on the substrate may comprise a contact pad respectively at the chip and at the circuit element, thereby forming a pair of contact pads with respect to each other. screw.

Each contact pad at the chip may be in the form of a boss. Advantageously, the thin layer is associated with the protective substrate by adhesive means which maintain a separation between the facing faces of said layer and said substrate.

According to a preferred embodiment, the device is in the form of elementary modules composed of at least one chip and a portion of the protective substrate in the format of the or each chip forming the module.

The module can thus be a means of identifying or tracking an object with which it is associated. It can in particular allow an external exchange of data over the air.

The invention will be better understood and its advantages will appear more clearly on reading the preferred embodiments, given purely by way of non-limiting examples with reference to the accompanying drawings in which - Figure 1, already described, is a view in plan showing a set of chips from SOI technology and backed by a protective substrate; - Figure 2, already described, is a sectional view along the line II-II 'of Figure 1, showing an assembly consisting of a chip, a substrate portion backed by the chip and adhesive pads retaining the chip to the substrate; FIG. 3 is a plan view of a protective substrate having patterns forming elements to be connected to chips, in accordance with the present invention; FIG. 4 is a plan view of a silicon layer on which chips are formed according to so-called silicon on insulator technology; - Figure 5 is a sectional view showing the arrangement of a chip and its protective substrate made in accordance with Figure 4; - Figure 6 shows schematically a welding operation between contact pads on the chips and the protective substrate according to a preferred embodiment of the invention; FIG. 7 is a plan view showing the semiconductor layer on which the chips are formed with its protective substrate at the end of the soldering operation; and FIG. 8 is a sectional view of a module comprising a chip and its protective substrate after cutting the assembly represented in FIG. 7.

Fig. 3 is a plan view of a glass plate for forming the protective substrate (also known as the intermediate substrate) 4 after the processing steps according to the embodiment according to the invention. This protective substrate 4 is intended to be used for the production of a set of chips according to silicon-on-insulator technology (also known as SOI for "silicon on insulator" according to the English terminology).

This technology is known in itself; the embodiments which are described here are based on an implementation of this technology disclosed in the patent document WO-A-98 02921 in the name of the company KOPIN, which makes it possible in particular to obtain an active layer forming the chip 2 d a thickness of the order of 10 microns, or substantially less. The protective substrate 4 is in the form of a thin circular wafer in the format of the silicon wafer on which the chips 2 are formed. Typically, the protective substrate 4 has a thickness of the order of 800 microns for a dia. about 150 mm.

Normally, the protective substrate 4 is devoid of any electrically active element, its role being purely to serve as a mechanical support during the different stages of the development of the silicon layer. Indeed, the fragility of the silicon layer due to its extreme thinness tolerated by the SOI technology makes it necessary to use a protective substrate upstream of the treatment steps, until its cutting into individual chips and the transfer of chips on their definitive support. Then, the glass substrate 4 - or the portion thereof remaining after cutting - is normally removed and discarded, its role being terminated.

On the other hand, in accordance with the present invention, the protective substrate 4 is exploited to confer on it an additional support role for one or more electrical element (s).

In the example, the electrical element is an antenna that will be associated with each chip. As shown in Figure 3, is printed on a side 4a of the substrate 4 a set of patterns 20, each pattern being identical and disposed at a location which will be directly opposite a chip during subsequent manufacturing steps. Thus, the patterns 20 are arranged in rows of columns making the best use of the rounded contour of the substrate 4. In the example, each pattern comprises an electrically conductive track in the form of a spiral 20a with the ends close to each other each end ending in a connection pad 20b. Each connection pad 20b, made in the continuity of the spiral 20a, is formed by an electrically conductive area large enough to establish a good electrical and mechanical contact with a corresponding contact pad of the chip, as will be described later. Various techniques can be used to form the patterns on the substrate 4. The latter being conventionally made of glass, it is in particular possible to make the patterns by screen printing, by printing with an electrically conductive ink with an adhesive power on the glass, by lithography, vacuum metallization, etc. The thickness of the layer of electrically conductive material forming the pattern 20 is sufficient to allow a laser welding operation or thermocompression with the contact pads of the chip 2. In the example, the patterns are made by metallizations in aluminum of a thickness of the order of 5 microns.

Figure 4 shows the active layer of silicon after slicing from a crystalline silicon ingot. The surface elements 2 'intended to form the chips at the end of the manufacturing process are arranged in rows of columns in the same manner as the patterns 20 on the protective substrate 4. Each chip in the precursor state 2' has locations 8 'reserved for the formation of two contact pads 8 which, after manufacture, will be in the form of bosses 8, like the bosses described with reference to Figure 2. These locations 8' are closer to each other near a corner of the chip 2 '. Their configuration and their arrangement are provided in such a way that, for each chip, the two bosses 8 are directly opposite the two respective connection pads 20b of the pattern formed on the protective substrate 4.

FIG. 5 is a sectional view showing the relative positioning between the silicon layer comprising the chips 2 and the glass-protecting substrate 4 when these two are united. It will be noted that the face 4a of the substrate comprising the patterns 20 (composed of the elements 20a and 20b) is turned towards the chips 2. As for the example described with reference to FIGS. 1 and 2, the chips 2 of the silicon layer are fixed by adhesive pads 6, each having a face glued to a corner of a chip 2 and the other bonded to the face 4a of the substrate 4 facing the chip. These adhesive pads 6 also serve as spacer and allow in particular to establish a constant and well controlled gap and between the faces 4a and 2b of the substrate 4 and the chip 2 which are opposite.

In the example, this difference el is substantially equal to or slightly greater than the sum of the protuberance e3 of the bosses 8 relative to the general plane of the surface 2b of the chip 2 and the thickness e4 of the printing layer forming the connection pads 20b. In this way, in the assembly position of the silicon layer with the protective substrate 4, the top of each boss 8 is flush or is very slightly set back from the outer face of its corresponding connection pad 20b.

The operation of welding between the bosses 8 and the connection pads 20b will now be described with reference to FIG. 6. This welding is carried out by applying a solder energy through the thickness of the protective substrate 4. In FIG. for example, the welding is performed by laser beams 22. Each laser beam 22 passes through the glass substrate 4 and reaches a connection pad 20b on the face 4a of the substrate 4. In the embodiment, the laser transmits its energy simultaneously on several optical paths, each directed to the plumb of a respective connection to achieve. To do this, a matrix of optical fibers is used, each fiber 24 of which is connected by a first end 24a to a laser source 26 and has a second end 24b against the outside face 4b of the substrate, in line with a range of respective connection 20b, possibly with a correction for the refraction phenomena.

The energy thus transmitted raises the temperature of the connection pads 20b and, by thermal contact, that of the bosses 8. If necessary, it is possible to apply a slight force on the substrate 4 or on the chips 2 during this welding operation to compress the adhesive pads 6 and thus provide pressure at the junction points of the bosses 8 with the connection pads 20b.

Raising the temperature by thermal energy causes the melting of either connection pads 20b, bosses 8, or both. This fusion performs the welding between the connection pads and the bosses. As a result, each electrical element formed on the protective substrate 4 is connected to its corresponding chip 2 both electrically and mechanically.

The choice of metals or alloys for bosses 8 or 20b connection pads for welding in good conditions is within the reach of the skilled person. In the example, the constituent glass of the substrate 4 is transparent to the wavelengths of the laser beams usually used for micro-welding. In particular, it is possible to use a laser of the YAGNd type emitting at a wavelength of 1.06 microns for welding.

The number of optical fibers 24 associated with the same laser source 26 depends on the power of the latter, possible optical couplings and optical paths from one end to the other of the fibers. According to the embodiments, it is possible to provide one or more laser sources 26 connected to an array of optical fibers 24 making it possible to simultaneously perform all the soldering operations of a chip wafer 2. It is of course also possible to split the number of welds made in parallel, so that all the necessary welds for a chip wafer 2 is performed in several batches of chips.

Moreover, it is possible to associate not only one optical fiber 24, but several at each welding point to obtain a better energy input.

Alternatively, one or more laser heads can be mounted on a robot arm or other programmed automaton to perform the welds sequentially on the connection points, also through the thickness of the substrate 4.

According to another variant, the welds are made by a method of thermocompression or ultrasound. In these cases, the connection pads 20b and the contact pads 8 will preferably be aluminum. These two techniques are in themselves well known and will not be described here for the sake of brevity. Here too, the welds can be made by transmitting the solder energy through the thickness of the substrate 4.

Once the soldering operation is complete for a wafer, a solid block composed of the protective substrate 4 and interconnected chips 2 is obtained, as shown in FIG. 7.

It is then possible to cut the wafer into elementary assemblies 28 along the cutting lines D shown in FIG. 7.

As shown in FIG. 8, each assembly 28 thus comprises a chip 2, a portion of the substrate 4, in the format of the chip thus cut out, comprising an electrical element (here an antenna 20) and the portions of adhesive pads 26. The latter may remain stuck at the corners between the substrate 4 and the chip 2 to help maintain the integrity of the assembly 28.

In the example, the antenna 20 made on the protective substrate 4 is electrically connected to points of the circuit contained in the chip to allow an exchange of data (analog and / or digital) between the chip and the outside by radio. The antenna 20 can also be used to supply the circuit contained in the chip. The techniques of data exchange and remote feeding by an antenna in the context of chips are in themselves known and will not be described here for the sake of brevity.

The assemblies 28 thus individually cut have many applications in various fields, the chips can be designed to perform all kinds of functions.

Some non-exhaustive examples of application of chips thus produced are given below purely for the purpose of illustration - production of contactless smart cards, for example for electronic toll collection or access control; - Realization of electronic tags (also known as "tags") permanently or temporarily attached to objects or animals to enable their electronic identification and tracking by data storage, which can be scalable, in particular in the fields of. - breeding, ecology; - the monitoring of objects subject to litigation or investigation in case of incident (gas cylinders, containers of toxic products, etc); - the control of authenticity of objects likely to be counterfeited (luxury goods, luxury brands, records, videos, etc.), or original works or documents (certificates, titles, tickets, etc.); - monitoring of devices requiring maintenance or maintenance, for example to register and read electronically the history of parts or machines; - control against the theft of goods; - the realization of intelligent objects; - etc.

It will be noted that the invention makes it possible to produce on the protective substrate 4 all sorts of components connected to the chip facing it, these components being able to be, among others - at least one passive component: self, capacitance, resistance, electromagnetic shielding (by metallization); and / or at least one active component: integrated circuit, electronic components (transistors, diodes, light-emitting diodes, pixel display screens, and / or at least one micromechanical switch element, micro-actuator, etc .; .

The modules 28 can be glued directly on the surface of the support for which they are intended. As shown in Figure 8, it is possible to interpose an adhesive layer 32 between the face 4b of the substrate facing the support 30 and the exposed face 30a thereof.

Finally, it is possible to cover the exposed face 2a of the chip 2 with a protective film 34 once the module 28 mounted on its support 30. In the example of Figure 8, the protective film 34 completely covers the module 28 and at least a portion of the exposed face 30a of the support 30.

Claims (10)

<B> V E N D I C A T IO N S </ B> A method of manufacturing electronic devices, each comprising at least one chip (2) electrically connected to at least one circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4), characterized in that at least a portion of the circuit element (20) is made on the protective substrate (4), the latter forming an integral part of the manufactured device. 2. Method according to claim 2, characterized in that the chip (2) is made according to the silicon on insulator technology. 3. Method according to claim 1 or 2, characterized in that the circuit element made on the protective substrate is an antenna (20) intended to constitute a communication interface with the or each chip (2) to which it is connected . 4. Method according to any one of claims 1 to 3, characterized in that for each point of connection between the chip (2) and a circuit element (20) on the substrate (4) is made a contact pad ( 8, 20b) respectively at the chip and at the circuit element, thereby forming a pair of contact pads facing each other. 5. Method according to claim 4, characterized in that each contact pad at the chip (2) is in the form of a boss (8) _ 6. Method according to claim 4 or 5, characterized in that each contact pad at the level of the circuit element is in the form of a contact pad (20b) capable of fusing with the corresponding contact pad ( 8) of the chip (2). 7. Method according to any one of claims 1 to 6, characterized in that said thin layer is associated with the protective substrate (4) by adhesive means (6) which maintain a separation (el) between the facing faces (2b , 4a) of said layer and said substrate, and in that for the or each connection between the chip (2) and the circuit element (20) a contact pad (8, 20b) is respectively formed on the chip and on the circuit element, the corresponding contact pads being substantially arranged vis-à-vis and joining or slightly recessed from each other in the state of rest before their connection. 8. Method according to any one of claims 1 to 7, characterized in that at least one connection is made between the chip (2) and the circuit element (20) on the substrate (4) by welding, possibly by applying a pressure to bring together the corresponding connection means of the chip and the circuit element formed on the substrate. 9. The method of claim 8, characterized in that one or the welding (s) is carried out by transmitting a welding energy through the thickness of the protective substrate (4). 10. The method of claim 9, characterized in that the welding energy is from a laser beam (22). he. Method according to claim 10, characterized in that the laser beam (22) is transmitted by a plurality of optical paths (24), each directed towards a respective connection (20b, 8) to be made between the substrate (4) and the chip (2). 12. The method of claim 11, characterized in that each optical path is embodied by at least one optical fiber (24). 13. The method of claim 8 or 9, characterized in that the welding is carried out by thermocompression. 14. Method according to any one of claims 1 to 13, characterized in that the connections are made between each chip (2) and its respective circuit element (20) for a set of chips associated with the same protective substrate. (4), and in that then said protective substrate is cut to form elementary modules (28) composed of at least one chip and a portion of the protective substrate in the format of the or each chip forming the module. 15. The method of claim 14, characterized in that integrates at least one module (28) to an object (30). 16. The method of claim 15, characterized in that is affixed at least one module (28) on a surface (30a) of said object (30). 17. The method of claim 16, characterized in that it covers at least the exposed face (2a) of the or each chip (2) of the module (28) and at least a portion of the surface (30a) of said object (30) a protective film (34). 18. Use of an electronic device (28) resulting from the method according to any one of claims 1 to 17 as means for identifying and / or monitoring an object (30) associated with said device. 19. Use of a protective substrate (4) normally intended to protect a very thin active layer forming chips (2) according to so-called silicon-on-insulator technology for producing on said protective substrate (4) at least a part at least one element (20) intended to be connected to a corresponding chip. Electronic device comprising at least one chip (2) electrically connected to at least one circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4), characterized in that at least one a part of the circuit element (20) is formed on the protective substrate (4), the latter forming an integral part of the device. 21. Device according to claim 20, characterized in that the circuit element formed on the protective substrate is an antenna (20) intended to constitute a communication interface with the or each chip (2) to which it is connected. 22. Device according to claim 20 or 21, characterized in that for each point of connection between the chip and a circuit element on the substrate comprises a contact pad (8, 20b) respectively at the chip (2) and at the circuit element (20b), thereby forming a pair of contact pads facing each other. 23. Device according to claim 22, characterized in that each contact pad at the level of the chip (2) is in the form of a boss (8). 24. Device according to any one of claims 20 to 23 , characterized in that said thin layer is associated with the protective substrate (4) by adhesive means (6) which maintain a separation (el) between the opposite faces (2b, 4a) of said layer and said substrate (4). 25. Device according to any one of claims 20 to 24, characterized in that it is in the form of an elementary module (28) composed of at least one chip (2) and a portion of the protective substrate (4). ) in the format of the or each chip forming the module. 26. Device according to claim 25, characterized in that the module (28) is a means for identifying or tracking an object (30) with which it is associated. 27. Device according to claim 26, characterized in that the module (28) comprises means for ensuring a data exchange to the outside by radio.