FR2794570B1 - Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electrique - Google Patents
Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electriqueInfo
- Publication number
- FR2794570B1 FR2794570B1 FR9907056A FR9907056A FR2794570B1 FR 2794570 B1 FR2794570 B1 FR 2794570B1 FR 9907056 A FR9907056 A FR 9907056A FR 9907056 A FR9907056 A FR 9907056A FR 2794570 B1 FR2794570 B1 FR 2794570B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- portable device
- electrical conduction
- conduction paths
- manufacturing portable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06506—Wire or wire-like electrical connections between devices
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
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- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
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- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06551—Conductive connections on the side of the device
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
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- H01L2924/01005—Boron [B]
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- H01L2924/0105—Tin [Sn]
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- H01L2924/01082—Lead [Pb]
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- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
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- H01L2924/014—Solder alloys
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9907056A FR2794570B1 (fr) | 1999-06-04 | 1999-06-04 | Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electrique |
PCT/FR2000/001264 WO2000075985A1 (fr) | 1999-06-04 | 2000-05-11 | Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electrique |
AU45753/00A AU4575300A (en) | 1999-06-04 | 2000-05-11 | Method for making an integrated circuit portable device with electric conduction paths |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9907056A FR2794570B1 (fr) | 1999-06-04 | 1999-06-04 | Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electrique |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2794570A1 FR2794570A1 (fr) | 2000-12-08 |
FR2794570B1 true FR2794570B1 (fr) | 2003-07-18 |
Family
ID=9546371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9907056A Expired - Fee Related FR2794570B1 (fr) | 1999-06-04 | 1999-06-04 | Procede de fabrication de dispositif portable a circuit integre avec chemins de conduction electrique |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU4575300A (fr) |
FR (1) | FR2794570B1 (fr) |
WO (1) | WO2000075985A1 (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6910268B2 (en) * | 2001-03-27 | 2005-06-28 | Formfactor, Inc. | Method for fabricating an IC interconnect system including an in-street integrated circuit wafer via |
SG102639A1 (en) | 2001-10-08 | 2004-03-26 | Micron Technology Inc | Apparatus and method for packing circuits |
SG142115A1 (en) | 2002-06-14 | 2008-05-28 | Micron Technology Inc | Wafer level packaging |
DE10244446B4 (de) * | 2002-09-24 | 2004-08-19 | Infineon Technologies Ag | Halbleiterchipstapel |
SG119185A1 (en) | 2003-05-06 | 2006-02-28 | Micron Technology Inc | Method for packaging circuits and packaged circuits |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5749252A (en) * | 1980-09-09 | 1982-03-23 | Matsushita Electronics Corp | Manufacture of semiconductor device |
DE3446780A1 (de) * | 1984-12-21 | 1986-07-03 | Brown, Boveri & Cie Ag, 6800 Mannheim | Verfahren und verbindungswerkstoff zum metallischen verbinden von bauteilen |
US4984358A (en) * | 1989-03-10 | 1991-01-15 | Microelectronics And Computer Technology Corporation | Method of assembling stacks of integrated circuit dies |
US5311401A (en) * | 1991-07-09 | 1994-05-10 | Hughes Aircraft Company | Stacked chip assembly and manufacturing method therefor |
WO1995025341A1 (fr) * | 1994-03-15 | 1995-09-21 | Irvine Sensors Corporation | Empilements tridimensionnels de puces de c.i. dont les conducteurs sont accessibles par les traverses situees dans le plan d'acces a revetement passivation |
US5521434A (en) * | 1994-10-17 | 1996-05-28 | International Business Machines Corporation | Semiconductor chip and electronic module with integrated surface interconnects/components |
US5673478A (en) * | 1995-04-28 | 1997-10-07 | Texas Instruments Incorporated | Method of forming an electronic device having I/O reroute |
US5657537A (en) * | 1995-05-30 | 1997-08-19 | General Electric Company | Method for fabricating a stack of two dimensional circuit modules |
US5818107A (en) * | 1997-01-17 | 1998-10-06 | International Business Machines Corporation | Chip stacking by edge metallization |
KR20010021782A (ko) * | 1998-05-13 | 2001-03-15 | 롤페스 요하네스 게라투스 알베르투스 | 반도체 디바이스와 그 제조 방법 |
-
1999
- 1999-06-04 FR FR9907056A patent/FR2794570B1/fr not_active Expired - Fee Related
-
2000
- 2000-05-11 WO PCT/FR2000/001264 patent/WO2000075985A1/fr active Application Filing
- 2000-05-11 AU AU45753/00A patent/AU4575300A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
AU4575300A (en) | 2000-12-28 |
FR2794570A1 (fr) | 2000-12-08 |
WO2000075985A1 (fr) | 2000-12-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20100226 |