FR2786632B1 - Procede et dispositif d'alignement de phase a grande vitesse - Google Patents

Procede et dispositif d'alignement de phase a grande vitesse

Info

Publication number
FR2786632B1
FR2786632B1 FR9814991A FR9814991A FR2786632B1 FR 2786632 B1 FR2786632 B1 FR 2786632B1 FR 9814991 A FR9814991 A FR 9814991A FR 9814991 A FR9814991 A FR 9814991A FR 2786632 B1 FR2786632 B1 FR 2786632B1
Authority
FR
France
Prior art keywords
high speed
alignment method
phase alignment
speed phase
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9814991A
Other languages
English (en)
Other versions
FR2786632A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments France SAS
Original Assignee
Texas Instruments France SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments France SAS filed Critical Texas Instruments France SAS
Priority to FR9814991A priority Critical patent/FR2786632B1/fr
Publication of FR2786632A1 publication Critical patent/FR2786632A1/fr
Priority to US09/734,222 priority patent/US6549597B2/en
Application granted granted Critical
Publication of FR2786632B1 publication Critical patent/FR2786632B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
FR9814991A 1998-11-27 1998-11-27 Procede et dispositif d'alignement de phase a grande vitesse Expired - Fee Related FR2786632B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9814991A FR2786632B1 (fr) 1998-11-27 1998-11-27 Procede et dispositif d'alignement de phase a grande vitesse
US09/734,222 US6549597B2 (en) 1998-11-27 2000-12-11 High speed phase alignment process and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9814991A FR2786632B1 (fr) 1998-11-27 1998-11-27 Procede et dispositif d'alignement de phase a grande vitesse

Publications (2)

Publication Number Publication Date
FR2786632A1 FR2786632A1 (fr) 2000-06-02
FR2786632B1 true FR2786632B1 (fr) 2002-08-23

Family

ID=9533295

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9814991A Expired - Fee Related FR2786632B1 (fr) 1998-11-27 1998-11-27 Procede et dispositif d'alignement de phase a grande vitesse

Country Status (2)

Country Link
US (1) US6549597B2 (fr)
FR (1) FR2786632B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978379A (en) 1997-01-23 1999-11-02 Gadzoox Networks, Inc. Fiber channel learning bridge, learning half bridge, and protocol
US7430171B2 (en) 1998-11-19 2008-09-30 Broadcom Corporation Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
CA2389969A1 (fr) * 2002-06-25 2003-12-25 John W. Bogdan Traitement de signal numerique de phase multi-echantillonnee
US7782894B2 (en) * 2003-09-12 2010-08-24 Nokia Corporation Ultra-wideband/low power communication having a dedicated removable memory module for fast data downloads—apparatus, systems and methods
US20070058766A1 (en) * 2005-09-14 2007-03-15 Tellabs Operations, Inc. Methods and apparatus for recovering serial data
US8370446B2 (en) * 2008-07-10 2013-02-05 Tajitshu Transfer Limited Liability Company Advertisement forwarding storage and retrieval network
US8396180B2 (en) * 2008-12-18 2013-03-12 Kawasaki Microelectronics America Inc. High jitter tolerant phase comparator

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0624315B2 (ja) * 1983-11-04 1994-03-30 日本ビクター株式会社 移相器
EP0185779B1 (fr) * 1984-12-21 1990-02-28 International Business Machines Corporation Boucle numérique verrouillée en phase
SE9300679L (sv) * 1993-03-01 1994-09-02 Ellemtel Utvecklings Ab Bitsynkroniserare
US5533072A (en) * 1993-11-12 1996-07-02 International Business Machines Corporation Digital phase alignment and integrated multichannel transceiver employing same
US5579352A (en) * 1994-04-06 1996-11-26 National Semiconductor Corporation Simplified window de-skewing in a serial data receiver
JP2773669B2 (ja) * 1995-03-01 1998-07-09 日本電気株式会社 ディジタルpll回路
US5818890A (en) * 1996-09-24 1998-10-06 Motorola, Inc. Method for synchronizing signals and structures therefor
US6285726B1 (en) * 1998-05-18 2001-09-04 National Semiconductor Corporation 10/100 mb clock recovery architecture for switches, repeaters and multi-physical layer ports

Also Published As

Publication number Publication date
FR2786632A1 (fr) 2000-06-02
US6549597B2 (en) 2003-04-15
US20020009171A1 (en) 2002-01-24

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Effective date: 20150731