FR2779251B1 - Redondance appliquee a des cellules dram a faible remanence - Google Patents

Redondance appliquee a des cellules dram a faible remanence

Info

Publication number
FR2779251B1
FR2779251B1 FR9806970A FR9806970A FR2779251B1 FR 2779251 B1 FR2779251 B1 FR 2779251B1 FR 9806970 A FR9806970 A FR 9806970A FR 9806970 A FR9806970 A FR 9806970A FR 2779251 B1 FR2779251 B1 FR 2779251B1
Authority
FR
France
Prior art keywords
dram cells
low remanence
redundancy applied
redundancy
remanence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9806970A
Other languages
English (en)
Other versions
FR2779251A1 (fr
Inventor
Richard Ferrant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9806970A priority Critical patent/FR2779251B1/fr
Priority to US09/321,023 priority patent/US6091650A/en
Publication of FR2779251A1 publication Critical patent/FR2779251A1/fr
Application granted granted Critical
Publication of FR2779251B1 publication Critical patent/FR2779251B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2229/00—Indexing scheme relating to checking stores for correct operation, subsequent repair or testing stores during standby or offline operation
    • G11C2229/70—Indexing scheme relating to G11C29/70, for implementation aspects of redundancy repair
    • G11C2229/72—Location of redundancy information
    • G11C2229/723—Redundancy information stored in a part of the memory core to be repaired
FR9806970A 1998-05-29 1998-05-29 Redondance appliquee a des cellules dram a faible remanence Expired - Fee Related FR2779251B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9806970A FR2779251B1 (fr) 1998-05-29 1998-05-29 Redondance appliquee a des cellules dram a faible remanence
US09/321,023 US6091650A (en) 1998-05-29 1999-05-27 Redundancy for low remanence memory cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9806970A FR2779251B1 (fr) 1998-05-29 1998-05-29 Redondance appliquee a des cellules dram a faible remanence

Publications (2)

Publication Number Publication Date
FR2779251A1 FR2779251A1 (fr) 1999-12-03
FR2779251B1 true FR2779251B1 (fr) 2000-08-11

Family

ID=9526974

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9806970A Expired - Fee Related FR2779251B1 (fr) 1998-05-29 1998-05-29 Redondance appliquee a des cellules dram a faible remanence

Country Status (2)

Country Link
US (1) US6091650A (fr)
FR (1) FR2779251B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3361018B2 (ja) * 1996-11-11 2003-01-07 株式会社東芝 半導体記憶装置
TW548653B (en) * 1999-01-26 2003-08-21 Nec Electronics Corp Semiconductor memory device having redundancy memory circuit
KR100516735B1 (ko) * 2001-12-08 2005-09-22 주식회사 하이닉스반도체 메모리 셀 어레이 내부 배선을 이용한 로오 엑세스 정보전달 장치
US7003704B2 (en) * 2002-11-12 2006-02-21 International Business Machines Corporation Two-dimensional redundancy calculation
JP2004220722A (ja) * 2003-01-16 2004-08-05 Renesas Technology Corp 半導体記憶装置
US7881134B2 (en) * 2008-11-17 2011-02-01 Micron Technology, Inc. Replacing defective columns of memory cells in response to external addresses

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3071955D1 (en) * 1979-06-15 1987-05-27 Fujitsu Ltd Semiconductor memory device
JP2647312B2 (ja) * 1992-09-11 1997-08-27 インターナショナル・ビジネス・マシーンズ・コーポレイション 一括消去型不揮発性半導体記憶装置
US5381370A (en) * 1993-08-24 1995-01-10 Cypress Semiconductor Corporation Memory with minimized redundancy access delay
JPH07122099A (ja) * 1993-10-29 1995-05-12 Nec Corp 半導体メモリ
EP0801401B1 (fr) * 1996-04-02 2003-08-27 STMicroelectronics, Inc. Test et réparation d'un circuit de mémoire
US6011734A (en) * 1998-03-12 2000-01-04 Motorola, Inc. Fuseless memory repair system and method of operation

Also Published As

Publication number Publication date
FR2779251A1 (fr) 1999-12-03
US6091650A (en) 2000-07-18

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Legal Events

Date Code Title Description
CD Change of name or company name
ST Notification of lapse

Effective date: 20080131