FR2766993B1 - Circuit de retard reglable - Google Patents

Circuit de retard reglable

Info

Publication number
FR2766993B1
FR2766993B1 FR9710033A FR9710033A FR2766993B1 FR 2766993 B1 FR2766993 B1 FR 2766993B1 FR 9710033 A FR9710033 A FR 9710033A FR 9710033 A FR9710033 A FR 9710033A FR 2766993 B1 FR2766993 B1 FR 2766993B1
Authority
FR
France
Prior art keywords
delay circuit
adjustable delay
adjustable
circuit
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9710033A
Other languages
English (en)
Other versions
FR2766993A1 (fr
Inventor
Zalinge Klaas Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9710033A priority Critical patent/FR2766993B1/fr
Priority to US09/124,817 priority patent/US6124746A/en
Publication of FR2766993A1 publication Critical patent/FR2766993A1/fr
Application granted granted Critical
Publication of FR2766993B1 publication Critical patent/FR2766993B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
FR9710033A 1997-07-31 1997-07-31 Circuit de retard reglable Expired - Fee Related FR2766993B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9710033A FR2766993B1 (fr) 1997-07-31 1997-07-31 Circuit de retard reglable
US09/124,817 US6124746A (en) 1997-07-31 1998-07-29 Adjustable delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9710033A FR2766993B1 (fr) 1997-07-31 1997-07-31 Circuit de retard reglable

Publications (2)

Publication Number Publication Date
FR2766993A1 FR2766993A1 (fr) 1999-02-05
FR2766993B1 true FR2766993B1 (fr) 1999-10-15

Family

ID=9510055

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9710033A Expired - Fee Related FR2766993B1 (fr) 1997-07-31 1997-07-31 Circuit de retard reglable

Country Status (2)

Country Link
US (1) US6124746A (fr)
FR (1) FR2766993B1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69922961T2 (de) * 1999-10-15 2005-12-22 Stmicroelectronics S.R.L., Agrate Brianza Verfahren und Schaltung zur Detektion einer anormalen Off-Set-Spannung
FR2808922B1 (fr) * 2000-05-11 2003-09-12 Centre Nat Rech Scient Capteur de tension d'anode d'un composant de puissance vertical et utilisation en protection de courts-circuits
US6525586B1 (en) * 2001-11-09 2003-02-25 Genesis Microchip, Inc. Programmable delay element using differential technique
EP2877958B1 (fr) * 2012-07-25 2019-09-04 HRL Laboratories, LLC Circuit neuronal et procédé
US11501143B2 (en) 2013-10-11 2022-11-15 Hrl Laboratories, Llc Scalable integrated circuit with synaptic electronics and CMOS integrated memristors
US10147035B2 (en) 2016-06-30 2018-12-04 Hrl Laboratories, Llc Neural integrated circuit with biological behaviors
US10284188B1 (en) 2017-12-29 2019-05-07 Texas Instruments Incorporated Delay based comparator
US10673452B1 (en) 2018-12-12 2020-06-02 Texas Instruments Incorporated Analog-to-digital converter with interpolation
US10673456B1 (en) 2018-12-31 2020-06-02 Texas Instruments Incorporated Conversion and folding circuit for delay-based analog-to-digital converter system
US11316526B1 (en) 2020-12-18 2022-04-26 Texas Instruments Incorporated Piecewise calibration for highly non-linear multi-stage analog-to-digital converter
US11387840B1 (en) 2020-12-21 2022-07-12 Texas Instruments Incorporated Delay folding system and method
US11309903B1 (en) * 2020-12-23 2022-04-19 Texas Instruments Incorporated Sampling network with dynamic voltage detector for delay output
US11438001B2 (en) 2020-12-24 2022-09-06 Texas Instruments Incorporated Gain mismatch correction for voltage-to-delay preamplifier array
US11962318B2 (en) 2021-01-12 2024-04-16 Texas Instruments Incorporated Calibration scheme for a non-linear ADC
US11316525B1 (en) 2021-01-26 2022-04-26 Texas Instruments Incorporated Lookup-table-based analog-to-digital converter
US11881867B2 (en) 2021-02-01 2024-01-23 Texas Instruments Incorporated Calibration scheme for filling lookup table in an ADC

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916470A (ja) * 1982-07-20 1984-01-27 Sony Corp パルス検出回路
US4812687A (en) * 1988-07-13 1989-03-14 International Business Machines Corporation Dual direction integrating delay circuit
US4893036A (en) * 1988-08-15 1990-01-09 Vtc Incorporated Differential signal delay circuit
JPH02190022A (ja) * 1989-01-19 1990-07-26 Fujitsu Ltd データ遅延回路
JPH0754335B2 (ja) * 1989-01-31 1995-06-07 富士通株式会社 ピーク値検出回路
JPH0575386A (ja) * 1991-09-18 1993-03-26 Fujitsu Ltd 遅延回路
US5594377A (en) * 1994-01-27 1997-01-14 Texas Instruments Incorporated Delay circuit for a write data precompensator system

Also Published As

Publication number Publication date
US6124746A (en) 2000-09-26
FR2766993A1 (fr) 1999-02-05

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Legal Events

Date Code Title Description
CD Change of name or company name
ST Notification of lapse

Effective date: 20070330