FR2755281A1 - DEVICE AND METHOD FOR ADJUSTING THE GRAY SCALE OF A DISPLAY SYSTEM USING THE USE OF IRREGULAR ADDRESSING - Google Patents

Abstract

This method for adjusting the gray scale in a display system comprising image signal display means (1) and two pluralities of electrodes, signal application means (2) from the electrode assemblies and means (4) for controlling the duration of application of the display signals, comprises applying to the means of applying a control signal for maintaining a desired pixel for a time interval corresponding to one of a plurality periods of subframes in a predetermined time interval, driving a plurality of electrodes by display signals in response to the control signal, each subframe period having a different duration proportional to a binary weight of the signal d 'display. Application in particular to the control of plasma display panels.

Description

The present invention relates to a display system and more

  particularly a device and method for adjusting the gray scale of a panel

plasma display.

  Extensive research has been conducted in the field of flat display devices for use in devices of the type using computer monitors and sign display panels. Among the various flat display devices, a plasma display panel (PDP) is currently being developed for use in television sets and computer monitors since the structure is

  simple and easy to enlarge.

  There are two main types of PDP panels, at

  know the DC-PDP panel and the AC-PDP panel.

  The DC-PDP panel is a special structure, in which pixels are placed at the intersections of a plurality of anode lines and cathode lines. The anode lines or cathode lines may be selected as scanning electrodes, which sequentially and in a predetermined order apply scanning pulses to each pixel. The other electrodes, which intersect the scanning electrodes, are used as data transmission electrodes or as signal transmission electrodes. The data transmission electrodes or the signal transmission electrodes determine whether the pixels connected to the scanning electrodes, which can be scanned according to image data, must be turned on or off. The scanning electrodes are controlled by holding pulses, by means of which the pixels previously activated during the addressing are kept in their "activated" state. On the other hand, pixels that have been previously disabled remain disabled, since the sustaining pulse voltages are lower than the initial discharge voltage (firing voltage or firing voltage). To disable previously activated pixels, hold pulses must be removed from the scanning electrodes for more than a specified time interval. Otherwise, an extinguishing pulse can be applied to the scanning electrodes to simultaneously turn off all

the pixels that are connected.

  The AC-PDP panel may have two types of structure, namely a two-substrate structure and a

surface discharge structure.

  The two-substrate structure AC-PDP has, like the DC-PDP structure, pixels at the intersections of column electrodes and row electrodes, each of the electrodes being periodically controlled by holding pulses. In the AC-PDP two-substrate structure, column electrodes or row electrodes may be selected as scanning electrodes, while the other electrodes may be selected as signal-transmitting electrodes, both sets of electrodes. electrodes being controlled by

  holding pulses as in the DC-PDP structure.

  However, in addition to the holding pulses, the scanning electrodes are activated by scanning pulses and the signal transmission electrodes are controlled by signal voltages in a predefined order. In the AC-PDP surface discharge structure, the scanning electrodes are arranged parallel to common electrodes, and the signal transmission electrodes are arranged perpendicular to both the scanning electrodes and the common electrodes. With this structure, pixels are placed at the intersections of the scanning electrodes and the signal transmission electrodes. These are two types of systems

  control for the AC-PDP surface discharge structure.

  One of the activation systems is known as ADS (Address Display Separation), in which the addressing and the maintenance of pixels are separated in time, while in the other system the addressing and maintenance are carried out simultaneously. For addressing the ADS system, clearing the entire screen is performed at the beginning of each subframe to remove the remaining wall charges from all pixels. Then, among the pixels on the electrodes, only the pixels to be activated are controlled by signal voltage pulses corresponding to an image signal of a scanning electrode, by means of the signal transmission electrodes, while the scanning electrodes are sequentially activated by the pulses of the scanning voltage. Once the addressing of the entire screen is completed, the sustain discharge appears during the time interval determined by the sub-frame binary weighting. The number of times this process repeats is equal to the predetermined number of subframes in an image period. The system, in which addressing and holding are performed simultaneously, is similar to the control system of the two-substrate structure. Furthermore, the gray scale control method according to the present invention is advantageous for the system, in which the addressing and

  maintenance are carried out simultaneously.

  A conventional PDP type display system will be described below, regardless of its structure, with reference to FIG. 1. The conventional display system of FIG. 1 comprises a PDP panel 1 as a unit of FIG. display, an activation circuit 2 for signal transmission electrodes, an activation circuit 3 for scanning electrodes, a control circuit 4 and an interface circuit 5. The PDP panel 1 comprises a plurality of electrodes of columns and lines and a plurality of pixels located at the intersections of column electrodes and row electrodes, and acts as an image display unit. The activation circuit 3 for the scanning electrodes is connected to the plurality of scanning electrodes and activates the selected scanning electrodes with voltage pulses for addressing, while simultaneously applying to the scanning electrodes pulses of the scanning electrodes. holding voltage for maintaining the discharge. The activation circuit 2 for the signal transmission electrodes is connected to the plurality of signal transmission electrodes and supplies to the signal transmission electrodes voltages corresponding to the image information for the pixels selected by the electrodes of the signal. scanning. The signal transmission electrode may or may not be activated by the holding pulses in addition to the signal transmission pulses, depending on its structure. The control circuit 4 is connected to the activation circuit 2 for the signal transmission electrodes and to the activation circuit 3 for the scanning electrodes so as to control the timing and the activation and deactivation sequence of each pixel. . The interface circuit 2, which is connected to the control circuit 4, transforms the input image signal sent to the PDP display system into the appropriate signal for the control circuit 4, and transfers the

  signal converted to the control circuit 4.

  With reference to FIG. 2, there is shown an addressing system for a DC-PDP structure of FIG. 1, in which all the input signals sent to the scanning electrodes and to the signal transmission electrodes are presented in FIG. the form of voltage pulses. The scanning electrodes receive different types of voltage pulses in response to one of the three modes of operation, i.e., an extinction mode.

  a hold mode and a write mode.

  Basically, only one electrode among all the scanning electrodes can be addressed during a pulse period. The basic addressing operations of the DC-PDP structure shown in FIG. 2 can be easily performed for an AD-PDP structure with the additional holding pulses applied to the signal transmission electrodes and the erasure pulses applied to the electrodes. signal transmission. Each of the signal transmission electrodes receives a signal which corresponds to an image information to be displayed on the pixels of the electrodes of the

scanning addressed.

  All the pixels of the display system are located at the intersections of the signal transmission electrodes and the scanning electrodes and are active and deactivated according to the voltage pulse waveform, which are sent to the transmission electrodes. signals when the scanning electrodes are scanned. For an illustration of the memory type PDP activation system, Figure 2 illustrates how the pixels are turned on and off if they receive the voltage pulse patterns. In FIG. 2, it is assumed that the pixels at the intersections of two scanning electrodes and two signal-transmitting electrodes are initially deactivated. Firstly, the scanning electrode S1 is addressed and only the signal transmission electrode D1 receives the low voltage VK during the period T1, which causes the activation of the pixel P11. This process is referred to as "writing". The pixel P11, which has been activated, keeps the state "activated" until the scanning electrode S1 is deactivated during the period T5. In this way, the pixels P21 and P12 are activated respectively during

the periods T3 and T6.

  The control system shown in Figure 2 can be applied to DC-PDP structures and AC-PDP structures regardless of the number of electrodes used. Types of voltage pulses, timing, etc. can be flexibly chosen depending on the electrode structure, the existence of additional electrodes or additional pixels and the own experience and

  from the own preference of design engineers.

  PDP systems, which have the structure illustrated above, are usually applied to display systems such as television sets, computer monitors, etc. In PDP displays, color tints can be obtained by adjusting the gray scale of pixels for each color. The gray-scale control of the memory-type PDP system, whether AC-PDP or DC-PDP, is performed by modulating the amount of time each pixel is activated in a frame image. Basically the grayscale control for the memory type PDP system is achieved by setting a time interval during an image period during which the pixel is activated. For example, to reproduce the gray scale of 256 hues or 8 bits, it is necessary to activate the pixel brighter 225 x M times, which means that the pixel receives 255 x M holding pulses during a period of image, M being an integer

  representing the minimum unit of the gray scale.

  In the conventional grayscale control system, the sub-frame method is adopted for its simplicity. In the subframe system, the entire image period is subdivided into subframes with binary weights, each of which determines the duration

  during which the pixels are activated for each sub-

  frame. This is why the number of subframes during an image period is identical to the number of bits in a digital input signal indicative of the brightness of a pixel. Referring to Fig. 3, there is shown a diagram showing by way of example the addressing system for 8-bit gray scale control based on the sub-frame system. An image period is subdivided into 8 subframes, and the times, during which the pixels are activated, are 128 (= 27) xM, 64 (= 26) xM, 32 (= 25) xM, 16 (= 24 ) xM, 8 (= 23) xM, 4 (= 22) xM, 2 (= 21) xM and M for each partial frame. Provided that the binary weights for the subframes are arranged as indicated above, if the gray scale of any pixel corresponds to a binary number "10101101", the pixel is activated only when the subframes have the binary weights 128xM, 32xM, 8xM, 4xM

  and M are addressed, and is disabled in the other subsets

frames.

  In the control of the gray scale based on the

  conventional sub-frame system, the length of a sub-frame

  frame is determined according to the number of scanning electrodes. In other words, the lengths of the sub-frames are calculated as the number of the electrodes multiplied by the period of the scanning signal or by the multiples of this period. In addition, all pixels are sequentially addressed in the same subframe and therefore

  transfer orders from a sub-frame to the sub-frame

  following frame are identical for all the conventional pixels. Therefore, once the addressing of the subframe is completed, all the pixels remain activated during the time interval which corresponds to the binary value of this subframe. Once this time has elapsed, the pixels remain disabled by the erase pulses until they are addressed again in the next subframe. Therefore, in the conventional secondary-region method, the lengths of the secondary zones are identical and therefore the duration during which the pixels remain deactivated can not be avoided, which has the effect that the time intervals during which the pixels remain deactivated can not be avoided. which pixels remain

  activated, differ from each other for each sub-

  frame. Therefore, the sequential addressing based secondary zone system has the disadvantage that even the brightest pixel must be disabled for a certain period of time, as shown in FIG. for the addressing of the entire screen is also required outside the duration during which the pixels are activated in each subframe, which becomes one of the disadvantages with regard to the screen brightness of the system PDP. It is an object of the present invention to provide a PDP display system which has increased brightness efficiency as well as increased luminance. Brightness output refers to the ratio of the brightness of a display system to the electrical power sent to that display system through circuitry

activation.

  Another goal is to provide a display system

  PDP that uses the irregular addressing system.

  Another goal is to provide a method for controlling gray scale using the system

irregular addressing.

  According to one aspect of the invention, there is provided a method for adjusting the gray scale of a display system, said display system comprising display means having a plurality of pixels for displaying signals of images, a plurality of first electrodes connected to said plurality of pixels, a plurality of second electrodes connected to said plurality of pixels so as to intersect the plurality of first electrodes, display signal application means for activating at least one of the plurality of first and second electrodes with display signals, control means for controlling the duration of application of said display signals, characterized in that the method comprises the steps of controlling said display signal applying means with a control signal to maintain a desired pixel to be activated for a corresponding duration at one of a plurality of subframe periods for a predetermined time interval and controlling said plurality of first electrodes with said display signals in response to said control signal; each period of said plurality of sub-frame periods having a different duration which is proportional to a binary weighting of the display signal represented in binary; and said display signal not being applied to the previously activated pixel, and the display signals which correspond to the same subframe period not being sequentially applied to the adjacent pixels, and display signals, which correspond to the different subframe periods, being applied simultaneously to the adjacent pixels, and reduce the duration during which said pixels are disabled, to increase the illumination efficiency. The predetermined time interval includes time periods of identical units in a number equal to a multiple of the least common multiple of M x N and 2N-1, where M is the number of first electrodes and N is the number of

  bits for adjusting the gray scale.

  According to another characteristic of the invention, there is provided a device for adjusting the gray scale of a display system, characterized in that said display system comprises display means comprising a plurality of pixels for displaying image signals, a plurality of first electrodes connected to said plurality of pixels, and a plurality of second electrodes connected to said plurality of pixels, intersecting said plurality of first electrodes, characterized in that it comprises: means application of display signals for applying display signals to at least one of said plurality of first and second electrodes, and control means for controlling the duration of application of said display signals, enabling said display signal applying means with a control signal for maintaining a desired pixel to be activated during a time interval which corresponds to one of a plurality of sub-frame periods contained within a predetermined time interval, and said activation signal applying means applies to said plurality of first electrodes said display signals in response to said control signal; each of said plurality of sub-frame periods has a different duration which is proportional to a binary weighting of said display signal represented in binary, said display signal is not applied to the previously activated pixel, said signals for the same subframe period are not applied sequentially to adjacent pixels, and display signals, which correspond to the different subframe periods, are simultaneously applied to said adjacent pixels, and that the duration, during which said pixels are deactivated, is reduced, so that

  to increase the efficiency of illumination.

  The control means further comprises memory means for storing application commands of said control signals for the number of said first electrodes and the number of said bits for adjusting the gray scale, and said control signals of said control means are applied with the application orders stored in said memory means. According to another aspect of the method, there is provided a method for applying binary signals, characterized in that it comprises the steps of: applying a number of signals represented in binary for a predetermined time interval, sending a plurality of sub-frame periods during said predetermined time interval, during which each of said plurality of sub-frame periods has a different duration which is proportional to a binary weighting of said signal represented in binary, and ensure that said binary signal is not applied to an element that has previously been activated by another signal, that binary signals, which correspond to the same subframe period, are not applied sequentially to adjacent elements, and that binary signals, which correspond to different periods of subframes are applied simultaneously

to said adjacent elements.

  According to another aspect of the invention, there is provided a device for applying binary signals, characterized in that it comprises: signal application means for applying binary signals to desired elements; and control means for controlling the instant of application of said binary signals, applying a control signal to said signal applying means for maintaining a desired element to be activated during a time interval which corresponds to one a plurality of sub-frame periods contained within a predetermined time interval, each of said plurality of sub-frame periods having a different duration, which is proportional to a binary weighting of said signal represented in binary, and said means for applying signals apply to said desired element said binary signals in response to said control signal; and that said binary signals are not applied to an element that has been previously enabled, that the binary signals, which correspond to the same subframe period, are not sequentially applied to the adjacent elements, and that binary signals, which correspond at different subframe periods are applied simultaneously to said adjacent elements. Other features and benefits of the

  present invention will emerge from the description given

  Hereinafter with reference to the accompanying drawings, in which: - Figure 1, which has already been mentioned, shown a diagram in a conventional display system using the plasma display panel; FIG. 2, which has already been mentioned, represents a diagram of the addressing system for the pixels of the conventional display system represented in FIG. 1; FIG. 3, which has already been mentioned, is a diagram of the conventional subframe system for control of the gray scale; FIG. 4 shows a diagram of a grayscale control system for 3 electrodes and a 4-bit gray scale using irregular addressing in accordance with the present invention; Fig. 5 is a schematic diagram of the gray scale control system having 8 electrodes and a 4 bit gray scale using regular addressing in accordance with the present invention; FIG. 6 represents a chronogram of

  activation signals representing lengths of the sub-

  frames for the grayscale control system, with the use of irregular addressing in accordance with the present invention; and FIG. 7 is a timing chart for the extinction of the pixels in the grayscale control system, having 7 electrodes and a 4-bit gray scale, using the irregular addressing in accordance with FIG. the present invention; and FIG. 8 represents a timing diagram of the addressing system used for irregular addressing.

  according to the present invention.

  The irregular addressing according to the present invention is a method for arranging the addressing orders of the scanning electrodes when controlling the brightness of pixels. The present invention can be applied to the system which comprises column electrodes and line electrodes, a first type of these electrodes constituting scanning electrodes for receiving the scanning signals, thereby making it possible to select and activate the pixels located the

  intersections of rows and columns.

  In accordance with the present invention, the length of each subframe is set to be proportional to each binary weighting that corresponds to the subframe, thereby making the lengths of the subframes different from one another. Likewise, the addressing commands for processing the electrodes from a sub-frame to a next sub-zone differ from each other regardless of the physical arrangement.

  electrodes, pixels being located in the sub-

  frames having simultaneously different binary weights. In general, the number of electrodes during irregular addressing is determined not by the addressing system, but by the dimensions of the display device. For example the number of pixels for the VGA system is 640x480, each pixel having three colors, so that the actual number of pixels is equal to 3x640x480. Most flat panel display devices use the activation system as a matrix array, and addressing is performed using the X and Y electrodes. For example, if the X electrodes are electrodes scanning, then the electrodes Y are signal transmission electrodes. In the plasma display system, it is preferable that the scanning signal frequency be low so that the number of scanning electrodes is 480 in the case of the VGA system and the number of scanning electrodes is 480.

  signal transmission electrodes is 640x3.

  Referring to FIG. 4, there is shown an address order, taken as an example, of scanning electrodes when setting the 4-bit gray scale with 3 electrodes in accordance with the present invention. Ai (i = 0, 1, 2, 3) represent the binary weights of

  secondary areas. Indeed we have AO = 1, A1 = 2, A2 = 4, A3 = 8.

  As shown in FIG. 4, when T = 1, the electrode LI is addressed and the signal transmission electrodes are activated by the signal of the bit of rank 0. For T = 2, the electrode L2 is addressed again and the signal transmission electrodes are activated by the 1-bit signal. Therefore, the pixels, which are applied to the electrode L1, remain in the secondary zone, whose binary weighting is 1 for T = 2 and 3. For T = 3, the electrode L2 is addressed and the transmission electrodes signals are controlled by the 1-bit signal, which has the effect that the pixels, which are applied to the electrodes L2 at T = 3 and 4, are located in the sub-frame, whose binary weighting is 1. In this way, it can be noted that the activation of the signal transmission electrodes with the corresponding binary weighting signals is possible while ensuring that the arbitrary electrode addresses are not

overlap for a period.

  At least NxM addressing periods are required to control an M-bit gray scale with N electrodes, since M addressing periods are required for 1 electrode. However, the number of addressing periods, which are needed, must be a multiple of 2W-1, which is close to and larger than NxM, since NxM addressing periods must be generated during 2Nl-1 hold periods. . Since it is not easy to find the order of regular addressing for hundreds of electrodes, the irregular addressing order is solved for the smaller number of electrodes, which can be adapted to the minimum number periods of impulses. For example, for 8-bit gray scale control, at least 263 pulse periods (255 hold pulses, 6 clear pulses) must be provided within an image frame, which can accommodate up to 32 electrodes. Then, the nesting system can be used to extend the application of an unresolved addressing order resolved for 32 electrodes or a lower number of electrodes for the display system with a higher number of electrodes, such as as VGA or XGA display systems. Therefore, at least 32 addressing periods are required to set the 4-bit gray scale with 8 electrodes, as shown in Fig. 5, and therefore 45 addressing periods are used, the number 45 being the number the closest to 32 among multiples of 15. The electrodes LI, L2 and L3 of Figure 5 have the same order of addressing as the LI electrode of Figure 4 if 3 successive pulse periods are grouped together. This occurs when the irregular addressing order for 3 electrodes in Fig. 4 is extended to 8 electrodes as shown in Fig. 5, with the nesting factor equal to 3. If the same addressing order is applied to N electrodes, the

  nesting factor is equal to N / 3.

  For 8-bit gray-scale control with 480 scanning electrodes such as the VGA system, at least 4080 addressing periods are required, 4080 being one of the multiples of 255, which is greater than 8x480, and the brightest pixel can remain on for a period of one frame. This brightness is greater than 4 times that of the pixels that could be activated for 1/4 of a frame period, as shown in Figure 3, in which 8x480 periods

  addressing were needed in a frame period.

  To multiply by 2 or 4 the duration, during which the pixels are activated, in the sequential addressing method, the pulse periods required for a frame period must be increased by 12.5% or 50% respectively. which increases by 4/9 or 4/12 the period during which the pixels are active, but this has the disadvantage that the scanning frequency must be higher and the brightness can not reach that of the irregular addressing, as high

whatever the frequency.

  Referring to Figure 6, there is shown a timing diagram of a control signal applied to two electrodes among others, and the lengths of each subframe represented in a period

  pulses in the case of a 4-bit gray scale.

  Among the voltage pulses of the activation signal as shown in FIG. 6, the hold voltages and the write (or start) voltages can be distinguished by their different heights. The precise shapes of the pulses of the activation signals are

  determined by the structure of the panels and pixels.

  Until now, it has been assumed that pixels are turned off instantly. However, in the case of the DC-PDP device, the hold pulses must be turned off for at least one hold period, since it takes a certain amount of time to turn off the plasma after the discharge. The erasure operation may or may not be performed during this deactivation period by the application of the erase pulse signal. In this case, a frame period TF is provided by TF = NSxTP + NxNExTP, TP being the period of the holding and addressing pulses, NS the number of holding pulses in an image, N the number of bit bits for the gray scale and NE the required number of pulses to disable the pixels. The number of hold pulses in an image or NS must be a multiple of 15 in the case of the 4-bit gray scale, and must be a multiple of 63 and 255 in the case of the respective gray scales at 6 bits and 8 bits. For example, in the case of setting the 8-bit gray scale of the PQP device with NE = 4 and 480 electrodes to be addressed, NS + 8x4> 8x480 must be provided to address 480 electrodes in an image. Therefore, NS must be a multiple of 155, which is equal to or greater than 3808, NS is at least 3825. Referring to Figure 7, a timing chart for irregular addressing of 7 electrodes with a scale is shown. 4-bit gray, NE = 1, NS = 2x15. E represents the periods during which the electrodes are deactivated. In the embodiment of Figure 7, up to 8 electrodes can be addressed. In the case of a complex situation as indicated above, the maximum number of electrodes, which can be addressed using an irregular addressing and the addressing order of these electrodes, can be found by means of computers once NS,

N and NE are given.

  Finally, Figure 8 shows a timing chart for the irregular addressing system according to the present invention. The horizontal lines in FIG. 8 represent the active periods during which the pixels applied to the concerned electrode are stimulated by holding pulses. As shown in Fig. 8, each electrode is addressed with its own addressing order, with the same intervals between adjacent sub-areas in the irregular addressing system. However, in the conventional system with reference to FIG. 3, all the electrodes are sequentially addressed in the same addressing order

  with the same secondary zone durations.

  According to the irregular addressing scheme according to the present invention, the duration during which the pixels are disabled while the gray scale is controlled can be reduced. As a result, the amount of current flowing in the activation circuit and in the pixels of a plasma display panel is reduced and the scanning frequency is reduced. Therefore, the present invention provides the advantage that the brightness of the plasma display panel increases, the power consumption is reduced and

  the activation circuit is easy to manufacture.

  The present invention has been described with reference to a particular embodiment in connection with a particular application. Those of ordinary skill in the art and those who have access to the teachings of the present invention will devise modifications and additional applications within the scope of the present invention. For example, the invention is not limited to the specific structure of the plasma display panel described herein by way of illustration only. In addition, those skilled in the art will appreciate that other display devices such as ELDs and FEDs can also be used as display devices, subject to the provision of certain layout modifications of the present

invention described here.

Claims (7)

  A method for adjusting the gray scale of a display system, said display system comprising display means (1) having a plurality of pixels for displaying image signals, a plurality of first electrodes connected to said plurality of pixels, a plurality of second electrodes connected to said plurality of pixels so as to intersect the plurality of first electrodes, means (2) for applying display signals to activate at least one plurality of first and second electrodes with display signals, control means (4) for controlling the duration of application of said display signals, characterized in that the method comprises the steps of: controlling said means (2) for applying display signals with a control signal for maintaining a desired pixel to be activated for a duration corresponding to one of a plurality of periods of time e subframes for a predetermined time interval; and controlling said plurality of first electrodes with said display signals in response to said control signal; each period of said plurality of sub-frame periods having a different duration which is proportional to a binary weighting of the display signal represented in binary; and said display signal not being applied to the previously activated pixel, and the display signals which correspond to the same subframe period not being sequentially applied to the adjacent pixels, and display signals, which correspond to the different subframe periods, being applied simultaneously to the adjacent pixels, and reduce the duration during which said pixels   are disabled, to increase illumination efficiency.   2. Method according to claim 1, characterized in that said predetermined time interval includes time periods of identical units in a number equal to a multiple of the least common multiple of M x N and 2N-1, M being the number first electrodes and N the number   of bits for grayscale adjustment.   A device for adjusting the gray scale of a display system, characterized in that said display system (1) comprises display means comprising a plurality of pixels for displaying image signals, a plurality of first electrodes connected to said plurality of pixels, and a plurality of second electrodes connected to said plurality of pixels, intersecting said plurality of first electrodes, characterized in that it comprises: means (2) for application of display signals for applying display signals to at least one of said plurality of first and second electrodes, and control means (4) for controlling the duration of said display signals, enabling said means for applying display signals with a control signal for maintaining a desired pixel to be activated during a time interval which corresponds to one of a plurality of periods of time subframes contained within a predetermined time interval, and said activation signal applying means applies to said plurality of first electrodes said display signals in response to said control signal; each of said plurality of sub-frame periods has a different duration which is proportional to a binary weighting of said display signal represented in binary, said display signal is not applied to the previously activated pixel, said signals for the same subframe period are not applied sequentially to adjacent pixels, and display signals, which correspond to the different subframe periods, are simultaneously applied to said adjacent pixels, and that the duration, during which said pixels are deactivated, is reduced, so that   to increase the efficiency of illumination.   4. Device according to claim 3, characterized in that said predetermined time interval includes time periods of identical units in a number equal to a multiple of the least common multiple of M x N and 2 -1, M being the number first electrodes and N the number   of bits for grayscale adjustment.   5. Device according to one of claims 3 or 4,   characterized in that said control means further comprises memory means for storing commands for applying said control signals for the number of said first electrodes and the number of said bits for adjusting the gray scale, and said control signals of said control means are applied with the application commands stored in said memory means.   A method for applying binary signals, characterized in that it comprises the steps of: applying a number of signals represented in binary for a predetermined time interval, sending a plurality of subframe periods during said interval of time predetermined time, during   which of said plurality of sub periods of   frames has a different duration which is proportional to a binary weighting of said signal represented in binary, and ensure that said binary signal is not applied to an element which has previously been activated by another signal, than binary signals, which corresponding to the same subframe period, are not applied sequentially to adjacent elements, and that binary signals, which correspond to different periods of subframes are applied simultaneously to said adjacent elements.   7. A device for applying binary signals, characterized in that it comprises: means (2) for applying signals to apply binary signals to desired elements; and control means (4) for controlling the instant of application of said binary signals, applying a control signal to said signal application means for maintaining a desired element to be activated for a time interval corresponding to the a plurality of sub-frame periods contained within a predetermined time interval, each of said plurality of sub-frame periods having a different duration, which is proportional to a binary weighting of said signal represented in binary, and said means (2) application of signals apply to said desired element said binary signals in response to said control signal; and that said binary signals are not applied to an element that has been previously enabled, that the binary signals, which correspond to the same subframe period, are not sequentially applied to the adjacent elements, and that binary signals, which correspond at different periods of subframes are   applied simultaneously to said adjacent elements.