FR2749967B1 - Dispositif de lecture de cellules d'une memoire - Google Patents
Dispositif de lecture de cellules d'une memoireInfo
- Publication number
- FR2749967B1 FR2749967B1 FR9607374A FR9607374A FR2749967B1 FR 2749967 B1 FR2749967 B1 FR 2749967B1 FR 9607374 A FR9607374 A FR 9607374A FR 9607374 A FR9607374 A FR 9607374A FR 2749967 B1 FR2749967 B1 FR 2749967B1
- Authority
- FR
- France
- Prior art keywords
- memory
- reading cells
- cells
- reading
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5645—Multilevel memory with current-mirror arrangements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9607374A FR2749967B1 (fr) | 1996-06-13 | 1996-06-13 | Dispositif de lecture de cellules d'une memoire |
US08/873,502 US5923590A (en) | 1996-06-13 | 1997-06-12 | Device for reading cells of a memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9607374A FR2749967B1 (fr) | 1996-06-13 | 1996-06-13 | Dispositif de lecture de cellules d'une memoire |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2749967A1 FR2749967A1 (fr) | 1997-12-19 |
FR2749967B1 true FR2749967B1 (fr) | 1998-09-25 |
Family
ID=9493033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9607374A Expired - Fee Related FR2749967B1 (fr) | 1996-06-13 | 1996-06-13 | Dispositif de lecture de cellules d'une memoire |
Country Status (2)
Country | Link |
---|---|
US (1) | US5923590A (fr) |
FR (1) | FR2749967B1 (fr) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6118702A (en) * | 1999-10-19 | 2000-09-12 | Advanced Micro Devices, Inc. | Source bias compensation for page mode read operation in a flash memory device |
US6750694B1 (en) * | 2000-11-28 | 2004-06-15 | Texas Instruments Incorporated | Signal clipping circuit |
US6574158B1 (en) | 2001-09-27 | 2003-06-03 | Cypress Semiconductor Corp. | Method and system for measuring threshold of EPROM cells |
EP1324344B1 (fr) * | 2001-12-28 | 2007-04-04 | STMicroelectronics S.r.l. | Structure d'amplificateur de lecture pour des dispositifs de mémoire multibit et méthode de lecture associée |
US7064585B2 (en) * | 2003-12-30 | 2006-06-20 | Intel Corporation | Detecting peak signals |
CN103366804B (zh) * | 2012-03-30 | 2017-10-13 | 硅存储技术公司 | 具有电流注入读出放大器的非易失性存储装置 |
KR20130130478A (ko) * | 2012-05-22 | 2013-12-02 | 삼성전자주식회사 | 입력 버퍼 |
US9824769B2 (en) * | 2015-07-16 | 2017-11-21 | Texas Instruments Incorporated | Fusible link cell with dual bit storage |
US9881661B2 (en) | 2016-06-03 | 2018-01-30 | Micron Technology, Inc. | Charge mirror-based sensing for ferroelectric memory |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62114200A (ja) * | 1985-11-13 | 1987-05-25 | Mitsubishi Electric Corp | 半導体メモリ装置 |
GB2214018A (en) * | 1987-12-23 | 1989-08-23 | Philips Electronic Associated | Current mirror circuit arrangement |
US4958123A (en) * | 1987-12-23 | 1990-09-18 | U.S. Philips Corporation | Circuit arrangement for processing sampled analogue electrical signals |
US5172338B1 (en) * | 1989-04-13 | 1997-07-08 | Sandisk Corp | Multi-state eeprom read and write circuits and techniques |
US5068830A (en) * | 1989-05-09 | 1991-11-26 | Advanced Micro Devices | High speed static ram sensing system |
US5381054A (en) * | 1993-12-07 | 1995-01-10 | Rockwell International Corporation | Multiple input comparator circuit for a switched resistive network |
-
1996
- 1996-06-13 FR FR9607374A patent/FR2749967B1/fr not_active Expired - Fee Related
-
1997
- 1997-06-12 US US08/873,502 patent/US5923590A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2749967A1 (fr) | 1997-12-19 |
US5923590A (en) | 1999-07-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20070228 |