FR2746230B1 - Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm" - Google Patents

Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm"

Info

Publication number
FR2746230B1
FR2746230B1 FR9603352A FR9603352A FR2746230B1 FR 2746230 B1 FR2746230 B1 FR 2746230B1 FR 9603352 A FR9603352 A FR 9603352A FR 9603352 A FR9603352 A FR 9603352A FR 2746230 B1 FR2746230 B1 FR 2746230B1
Authority
FR
France
Prior art keywords
atm
smoothing
application
type
frequency clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR9603352A
Other languages
English (en)
Other versions
FR2746230A1 (fr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to FR9603352A priority Critical patent/FR2746230B1/fr
Publication of FR2746230A1 publication Critical patent/FR2746230A1/fr
Application granted granted Critical
Publication of FR2746230B1 publication Critical patent/FR2746230B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5614—User Network Interface
    • H04L2012/5616—Terminal equipment, e.g. codecs, synch.
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5674—Synchronisation, timing recovery or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
FR9603352A 1996-03-18 1996-03-18 Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm" Expired - Lifetime FR2746230B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9603352A FR2746230B1 (fr) 1996-03-18 1996-03-18 Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm"

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9603352A FR2746230B1 (fr) 1996-03-18 1996-03-18 Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm"

Publications (2)

Publication Number Publication Date
FR2746230A1 FR2746230A1 (fr) 1997-09-19
FR2746230B1 true FR2746230B1 (fr) 1998-06-05

Family

ID=9490271

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9603352A Expired - Lifetime FR2746230B1 (fr) 1996-03-18 1996-03-18 Systeme de lissage d'une horloge a frequence non continue et son application a des transmissions asynchrones, notamment du type "atm"

Country Status (1)

Country Link
FR (1) FR2746230B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6157646A (en) 1998-01-26 2000-12-05 Adc Telecommunications, Inc. Circuit and method for service clock recovery
US6721328B1 (en) 1999-11-19 2004-04-13 Adc Telecommunications, Inc. Adaptive clock recovery for circuit emulation service
US7106758B2 (en) * 2001-08-03 2006-09-12 Adc Telecommunications, Inc. Circuit and method for service clock recovery

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4596026A (en) * 1983-05-09 1986-06-17 Raytheon Company Asynchronous data clock generator
GB2199469A (en) * 1986-12-23 1988-07-06 Philips Electronic Associated Clock signal generator
JP2937529B2 (ja) * 1991-03-27 1999-08-23 日本電気株式会社 クロック再生回路
JPH05136661A (ja) * 1991-08-02 1993-06-01 Nec Corp クロツク同期回路
US5339338A (en) * 1992-10-06 1994-08-16 Dsc Communications Corporation Apparatus and method for data desynchronization

Also Published As

Publication number Publication date
FR2746230A1 (fr) 1997-09-19

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