FR2735299A1 - STATIC SWITCH WITH INTEGRATED PROTECTION - Google Patents

Abstract

The static switch with integrated protection comprises an IGBT transistor (4) in series with a load (3) between the poles (1) and (2) of a direct source. Its grid (4c) is attacked by an output (5a) of a microprocessor (5), capable of delivering a high level where the IGBT is on, and a low level where the IGBT is blocking, depending on whether the state of an entry (5b) is "1" or "0". Every 10 ms, the microprocessor (5) emits a short pulse (1 ms) which is cut off from the high level, which reduces the elbow current, and has the effect of producing a pulse on the voltage drop in the 'IGBT, corresponding to an excursion of the operating point of this IGBT, beyond the elbow. Overcurrents are more clearly detected. A voltmetric means attacked by the conductor (9), and consisting of an amplifier (7) and a comparator (6) detects the overcurrents and puts the microprocessor (5) in the low state.

Description

"Static switch with integrated protection" The invention relates to a

  static switch with integrated overcurrent protection, to be arranged in series with a load between the poles of a voltage source, comprising at least one semiconductor element comprising a conduction space between an input electrode and an output electrode , with current / voltage characteristics between input and output having an elbow below which the element is saturated, and beyond which the element is desaturated, and an electrode for controlling the state of the conduction space, this control electrode being connected to the output of a control parameter generator delivering two levels, low and high of control parameter o the semiconductor

  is respectively blocking and passing.

  The semiconductor elements which meet the definition given above are essentially the bipolar transistors, the MOS transistors (metal-oxide semiconductors), and the bipolar IGBT insulated gate transistors, which borrow from conventional bipolar transistors their structure with emitting space. - collector, and to the MOS their insulated grid to control the passage of current with a very reduced control power. This group has in common that the current between input and output electrodes (emitter and collector for bipolar and IGBT transistors, source and drain for MOS) is reversibly controlled by the parameter applied to the control electrode ( base current for the bipolar transistor, gate voltage for MOS and IGBT), which allows to positively interrupt the flow of current in the conduction space, unlike the thyristors and triacs which must be primed at the start of each conduction period, and only become blocking after an external interruption and in the absence of reboot. It will be observed that the trigger cut-off thyristors can be deactivated by application of an appropriate pulse for a normal through current. But the power of this pulse increases with the current to be cut, so that the

  overcurrents cannot be cut reliably.

  The protection supposes that the overcurrents are detected by a sensor, and that this causes the blocking of the semiconductor, and the breaking of the switch. By integrated protection is meant a provision where the semiconductor element acts as a sensor. An advantage of this arrangement lies in the fact that the losses in the sensor are not added to the losses in the semiconductor element which acts as a switch. In practice, overcurrents are detected by the overvoltages they cause at the sensor terminals, i.e., with integrated protection, between the

  semiconductor input and output electrodes.

  Patent document FR-A-2 700 647 describes a static switch with integrated protection consisting of an IGBT transistor in which a feedback circuit controls the emitter-gate control voltage to stabilize the emitter-collector voltage drop, overcurrents then being detected by exceeding a

threshold by the control voltage.

  It is understood that, under normal conduction conditions, the minimization of losses must be sought, therefore a waste voltage as low as possible, taking into account the capacities of the semiconductor element, which implies that this semiconductor element is saturated, the high level of the parameter applied to the control electrode being

high enough.

  But in saturation mode, the internal voltage drop in the semiconductor element increases little when the crossing current increases, as long as we remain below the bend which translates the desaturation. A significant increase in the waste voltage is therefore detected only during overcurrents much greater than the normal current, which cause an excursion of the operating point which reaches or exceeds the characteristic bend. And if the operating point is shifted under normal conditions (by reducing the control parameter) to detect proportionally lower overcurrents, the losses in the semiconductor are increased. The object of the invention is to produce a static switch with integrated protection of simple design, where losses are low, and which has a cut-off threshold for overcurrents close to the current.

  operating at maximum rated load.

  This object is achieved by a static switch with integrated overcurrent protection, to be arranged in series with a load between the poles of a voltage source, comprising at least one semiconductor element comprising a conduction space between an input electrode and an output electrode, with current / voltage characteristics between input and output having an elbow below which the element is saturated, and beyond which the element desaturates, and an electrode for controlling the state of the conduction space, this control electrode being connected to the output of a control parameter generator delivering two levels, low and high, of control parameter where the semiconductor is respectively blocking and passing, characterized in that it further comprises a voltmeter means connected at the input to the input and output electrodes and sensitive to exceeding a threshold of the input voltage, threshold set at beyond the elbow for the high level, to send, to the control parameter generator, a reset signal, the control parameter generator being able to periodically deliver to the control electrode, a short pulse, subtracting from the high level. It is understood that thus, during the majority of the conduction time the semiconductor is effectively saturated, and its losses are low, the waste voltage remaining low. However, during the period of the periodic pulses delivered by the control parameter generator, the characteristic elbow is displaced towards the weaker currents, so that an overcurrent, even a small one, causes a significant voltage drop in the space of conduction, the semiconductor being temporarily desaturated. The brevity of the pulse, during which the losses are significant, has the effect that the degraded energy is reduced, so that the overall losses in the semiconductor element are little increased. A suitable adjustment of the height of the pulse subtracted from the high level of the control parameter generator (on state) makes it possible to reach a level of waste voltage which causes the switching of the control parameter to the low state, and in consequence the cutting of the overcurrent, such as the discrimination of the

  cut-off occurs in a narrow area.

  With a DC voltage source, the frequency of recurrence of the pulses and their duration will be determined to take into account the maximum value of the overcurrents to be expected, and the thermal capacity of the semiconductor element (so that it is not destroyed by a very strong overcurrent occurring just after an impulse). With an AC voltage source, the pulse recurrence frequency will be linked to the

source frequency.

  Also, preferably, a static switch for alternating voltage will comprise two semiconductor elements connected in series connected by their

  input electrodes and each with a head mounted diode

  spade between the input and output electrodes, the control electrodes being driven in parallel by the control parameter generator while the voltmetric means is attacked at the input by the voltage between output electrodes, the pulses delivered by the generator command parameter being synchronized to

  the voltage peaks between the output electrodes.

  The structure thus defined of the switching cell is conventional for controlling the two half-alternations of the alternating voltage, the current passing, at each half-alternation by the semiconductor element which is in the passing direction, and by the diode. mounted between the input and output electrodes of the other semiconductor element. Furthermore, it is understood that it is advantageous that the pulses are synchronous with the waste voltage peaks, which correspond to the peaks of current flowing, the pulses resulting from

  waste voltage then being maximum.

  In fact, the synchronization of the pulses is not obtained directly by detecting the peaks of the waste voltage, these being liable to vary in amplitude with the conditions of use of the switch, in particular through current and the presence of '' a waste voltage pulse creating risks of interference. The control parameter generator is therefore sensitive to zero crossings of the voltage between output electrodes to deliver the short pulse to the control electrodes with a quarter-period delay of the alternating voltage on the zero crossing. cited above. Secondary characteristics and advantages of

  the invention will moreover emerge from the description which

  will follow, with reference to the accompanying drawings in which: - Figure 1 is a diagram of a static switch according to the invention, for a DC voltage source; - Figure 2 shows a current emitter-collector characteristic of an IGBT, suitable for the implementation of the invention; - Figure 3 is an explanatory diagram of the operation of the switch of Figure 1; - Figure 4 is a diagram of a switch according to the invention, for an alternating voltage source; Figure 5 is an explanatory diagram of the

  operation of the switch of figure 4.

  According to the embodiment of the invention chosen and shown in FIG. 1 of a static switch, between the positive 1 and negative 2 poles of a DC voltage source are connected in series a load 3 and a bipolar transistor with insulated gate 4 (IGBT), with a collector 4a (output electrode), a transmitter 4b (input electrode), a grid 4c (control electrode). This grid 4c is connected to the output 5a of a microprocessor 5 programmed to deliver at output 5a a low level (blocking level of the IGBT) when an input 5b of this microprocessor is in the state "0", and , when this input 5b is in the state "1", a high level such that the IGBT 4 is on and saturated for all the currents that can support the load 3. Of course, the voltage levels delivered by the microprocessor are shaped by a drive stage adapted to control the semiconductor switch. This stage is known per se, and is not shown for clarity of the figure. Here the low level is 0 volts and the high level is 15 volts. In addition, the microprocessor 5, when its input 5b is in the state "1" periodically emits on its output 5a a short pulse which is cut off from the high level. Here, for example, the pulse has a recurrence frequency of 100 Hz, a duration of 1 ms and amplitude of 5 volts, i.e. a level of

10 volts.

  The static switch also comprises, the transmitter 4b being to the internal ground of the switch, a voltage tap conductor 9 connected to the collector 4a of the IGBT 4 which attacks the inverting input of an operational amplifier 7 to through a voltage excursion limiter 9a. Amplifier 7 is provided with feedback to operate in proportional fashion. The output of amplifier 7 attacks through a logic inverter 7a the inverting input of an operational amplifier 6 mounted as a comparator to output a state "1" when the voltage at the input of the comparator is above a threshold fixed by a bridge 8, and a state "0" when this voltage is below the threshold. It will be added that the appearance of a state "0" on the input 5b of the microprocessor 5 brings the output 5a to its low level in an irreversible manner, and that the reactivation of the microprocessor 5 requires an external action.

  Before undertaking the description of the operation

  of the switch of figure 1, one will refer to figure 2 which gives the characteristic curves collector current / collector emitter voltage of an IGBT, according to the grid-emitter voltage. We see that these curves have three regions, 10 a region of saturation where the collector current increases very quickly with the collector-emitter voltage, 12 a region where the collector current becomes substantially independent of the collector-emitter voltage, the IGBT being desaturated , and 11 a bend region which connects regions 10 and 12. Furthermore, in these three regions the collector current is a function of the grid-emitter voltage substantially in the

same proportion.

  In FIG. 1, the control parameter is the gate-emitter voltage VG applied to the gate 4c, and the voltage of the conductor 9 relative to ground is the collector-emitter voltage of the IGBT transistor 4. If we refer in FIG. 3, the diagram gives the evolution over time, at the lower part, of the control parameter or voltage, with a high level 20, and periodic pulses 21 which are cut off from the high level 20, the last pulse 21 being followed by the cancellation of the control voltage, cancellation which

corresponds to the low level.

  In the middle part of the diagram, an increasing collector current IC 22 has been represented up to a tripping current 23. The upper part of the diagram shows the collector-emitter voltage VCE resulting from the combination of the evolution of VG and of IC. It will be understood that the voltage drop in the transistor remains low compared to the source voltage between the poles 1 and 2 (FIG. 1), so that the pulses at level 21 cause practically no reduction in current compared to the high level 20 As long as the collector current remains low, in the saturation region, the control voltage levels 20 and 21 determine substantially equal collector-emitter voltages 24 and the pulses in reduction of level on the grid do not result in accidents. of VCE, then the current increasing, pulses 25 begin to appear in the form of an increase in the voltage VCE, then, while the voltage VCE corresponding to level 20 increases little, the pulses 25 grow very quickly, until the crossing of a threshold level 26 causes a state "0" at the input of the microprocessor 5, and the blocking of the IGBT transistor 4. It will be appreciated that the invention makes it possible to obtain a good e tripping accuracy without

  that the maximum load losses are high.

  The static switch of FIG. 4 is provided for the more frequent case of an AC voltage supply. The switch part proper comprises two transistors 33 and 34, here IGBTs similar to that of FIG. 1, connected in series between phase 30 and a load 32, connected to neutral 31. The transistors 33 and 34 are connected by their input electrodes or emitters 33b, 34b while the collector 33a of the transistor 33 is connected to the phase 30, and the collector 34a of the transistor 34 is connected to the load 32. Two diodes 35 and 36 are mounted head to tail with transistors 33 and 34

  between their emitters and collectors, the expression head-

  spade signifying that the directions passing from the transistor and the associated diode are the opposite. Thus, during a half-wave of the alternating voltage, the current will pass in series through the transistor 33 and the diode 36, and during the other half-wave through the transistor 34 and the

diode 35.

  The control part includes elements similar to those of FIG. 1. In particular, a microprocessor 37 drives through its output 37a jointly the gates 33c and 34c of the transistors 33 and 34 and is driven on its input 37b by a comparator 39. But the microprocessor 37 is attacked on an input 37c by a voltage nullity detector 38, arranged in bypass on a conductor 47 connected to the collector 34a of the transistor 34. The existence of a zero voltage on the conductor 47 corresponds to the cancellation of the through current the switch. This makes it possible to synchronize, with a delay of a quarter of period of the source voltage, the emission of a pulse of entrenchment of a high level on the output 37a of the microprocessor 37. The pulse will then be synchronous with the

  current peaks through the switch.

  The determination of the voltages between transmitters and collectors is carried out as follows: conductors 46 and 47 are respectively connected to collectors 33a and 34a of transistors 33 and 34 and drive respectively two amplifiers 42 and 43 similar to amplifier 7 of the figure 1, through voltage excursion limiters 46a and 47a. At the output of amplifiers 42 and 43 are arranged diodes 44 and 45 at the head of an adder, or adder 48, so as to retain only the positive parts of the output voltages of amplifiers 42 and 43. Thus we will have the point of summation 48, and therefore at the input of comparator 39, a succession of half-waves of voltage corresponding respectively to half-waves of current through the switch constituted by the

transistors 33 and 34.

  If we refer to FIG. 5, the diagram comprises at the lower part the evolution of the gate control voltage VGE, with a high level 50, and pulses 51 subtracting from level 50. These pulses are synchronized on the crossing current ridge,

as just explained.

  At the top of the diagram are represented the waveforms of tension at the point of summation 48. The arcs which this tension describes are very flattened because of the shape of the characteristic current / tension in the region of saturation 10 (figure 2 ). Three peak voltage levels 52a, 53a, 55a have been shown, corresponding to three levels of current respectively low, close to full load, and low overcurrent. On the half-waves 52 there is no pulse, on the half-waves 53 there appear pulses 54 clearly visible but which remain below the threshold 57, while on the half-wave 55 the pulse 56 exceeds the threshold 57, and causes the transistors to block in synchronism with the pulse. The invention has been described for IGBT transistors because these work with very low control powers in comparison with conventional bipolar transistors, and are significantly less expensive than MOS transistors for the same current flowing at least in the application. described. But these three types of semiconductors having similar characteristic curves, depending on the value of a control parameter, can be used for the implementation of the invention, with arrangements within the reach of a man

of career.

  Of course, the invention is not limited to the examples described, but embraces all the variants thereof.

  in the context of the claims.

Claims (4)

  1- Static switch with integrated overcurrent protection, to be placed in series with a load (3, 32) between the poles (1, 2; 30, 31) of a voltage source, comprising at least one semiconductor element (4; 33, 34) comprising a conduction space between an input electrode (4b; 33b, 34b) and an output electrode (4a; 33a, 34a), with current / voltage characteristics between input and output having a bend below which the element is saturated, and beyond which the element is desaturated, and a control electrode (4c; 33c, 34c) of the state of the conduction space, this control electrode being connected at the output of a control parameter generator (5, 37) delivering two levels, low and high (20, 50), of control parameter o the semiconductor is respectively blocking and passing, characterized in that it further comprises a voltmetric means (6, 7, 8; 42, 43, 48, 39) connected at the input to the input electrodes output and output and sensitive to exceeding a threshold (26, 57) of the input voltage, threshold adjusted beyond the bend for the high level, for transmitting, intended for the control parameter generator (5, 37), a signal for setting to the low state, the control parameter generator being capable of periodically delivering to the control electrode (4c; 33c, 34c), a short pulse (21, 51), subtracting the level high (20, 50).   2- Switch according to claim 1, characterized in that the semiconductor element is chosen from bipolar, MOS, and bipolar transistors with insulated gate (IGBT).   3- Switch according to one of claims 1 and 2,   for an AC voltage, characterized in that it comprises two semiconductor elements (33, 34) mounted in series connected by their input electrodes (33k, 34k) and each with a diode (35, 36) mounted head- spade between the input and output electrodes, the control electrodes (33c, 34c) being driven in parallel by the control parameter generator (37) while the voltmeter means (42, 43, 48, 39) is driven at the input by the voltage between output electrodes (33a, 34a), the pulses (51) supplied by the control parameter generator (37) being synchronized on the peaks of the   voltage between output electrodes.   4- Switch according to claim 3, characterized in that the voltmetric means comprises two amplification chains (42, 43) each connected at the input between the output electrode and the input electrode of a semiconductor element (33, 34 ), and connected at output to two inputs of an adder (48).   - Switch according to one of claims 3 and 4,   characterized in that, the alternating source voltage having a known period, the control parameter generator (37, 38) is sensitive to the zero crossing of the voltage between the input and output electrodes of the semiconductor (33, 34), and delivers the short pulse to the control electrodes (33c, 34c) with a delay of a quarter   period on the aforementioned zero crossing.