FR2719404A1 - Method for enlarging / reducing image data in a digital image processing system and circuit therefor. - Google Patents

Abstract

A method of enlarging / reducing image data for use in a digital image processing system, performing enlargement and reduction of image data by using a small amount of look-up table data while satisfying to a wide range of enlargement and reduction operations as required by a user, and simplifying the circuit structure. The enlargement / reduction data is calculated by a microprocessor so that the zoom ratio can be easily changed by software variation.

Description

Method for enlarging and reducing image data in a

  digital imaging processing and circuit therefor.

  The present invention relates to a method of enlarging / reducing image data in a digital image processing system, and more particularly, to a method of enlarging / reducing input image data according to a report

  arbitrary enlargement and reduction specified by a user.

  Generally speaking, digital image processing systems, for example, a digital reproducer or facsimile which converts an image into an electrical signal and processes the result using a photoelectric device (i.e. an image sensor such as a charge coupled device), require a function to enlarge or reduce an image of initial format, in other words, a ratio reduction function or an enlargement / reduction function. In order to satisfy this requirement, an enlargement / reduction function is carried out according to a conventional process in which a regulated copy ratio (for example zoom), even according to steps of

  1% for documents of standardized dimensions is made possible.

  A technique applied to conventional enlargement and reduction operations, such as above, is shown in Figure 1. Here, the duty cycle of an input (write) clock is controlled to correspond to a ratio of zoom when image data is written to an image memory, for example, a linear memory for storing the image data along a line of the main analysis direction, using a data synchronization signal picture and the

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  duty cycle of an output (read) clock is controlled to correspond to a zoom ratio when the image data is read from the image memory. In other words, when an image is to be doubled in size, the image data input at the rate of the image synchronization signal is written to an image memory and this image data is read from the memory. image for two pulses of the image synchronization signal, thereby providing an image which is twice the size of the original. On the other hand, when an image is to be halved in size, alternating image data is written to the image memory for every other synchronization signal pulse and the image is read from the image memory. at the rate of l0 image synchronization signal, thereby delivering an image whose format is half the original. (A more detailed process is described in the patent application

Japanese published N sho 59-39158).

  Enlargement (115% reproduction) and reduction (85% reproduction) operations performed according to the above technique, are shown by way of example in the following Tables 1 and 2, respectively, where P is a value used in conjunction with the zoom ratio, K is an integer value and R is the zoom ratio.

Table 1

  Number of ele- Value of Value of Value of Number of picture elements data data input image data P + R P K

1 1.15 0.00 1 1

2 1.30 0.15 1 2

3 1.45 0.30 I 3

4 1.60 0.45 1 4

1.75 0.60 1 5

6 1.90 0.75 1 6

7 2.05 0.90 2 7.8

8 1.20 0.05 1 9

9 1.35 0.20 1 10

1.50 0.35 1 11

11 1.65 0.50 1 12

12 1.80 0.65 1 13

13 1.95 0.80 1 14

14 2.10 0.95 2 15.16

1.25 0.10 1 17

16 1.40 0.25 1 18

17 1.55 0.40 1 19

18 1.70 0.55 1 20

19 1.85 0.70 1 21

2.00 0.85 2 22.23

21 1.15 0.00 1 24

22 1.30 0.15 1 25

23 1.45 0.30 1 26

Table 2

  Number of Elements - Value of Value of Number of Picture Elements Data Input Input Image Data P + R P K

1 0.85 0.00 0

2 1.70 0.85 1 1

3 1.55 0.70 1 2

4 1.40 0.55 I 3

1.25 0.40 1 4

6 1.10 0.25 1 5

7 0.95 0.10 o

8 1.80 0.95 1 6

I 9 1.65 0.80 I 7

1.50 0.65 1 8

it 1.35 0.50 1 9

12 1.20 0.35 1 10

13 1.05 0.20 1 1il

14 0.90 0.05 0

1.75 0.90 1 12

16 1.60 0.75 1 13

17 1.45 0.60 1 14

18 1.30 0.45 1 15

19 1.15 0.30 1 16

1.00 0.15 1 17

21 0.85 0.00 0

22 1.70 0.85 1 18

23 1.55 0.70 1 19

  In the above tables, a zoom ratio (R) is sequentially accumulated for the number of input picture elements (pixels) and the zoom ratio (R) is accumulated again relative to the reduction of the decimal place of values

  accumulated, and an integer part (K) of the accumulated values is examined.

  In the operating state of Table 1, the zoom ratio (R) is 1, 15. Here, if the whole part examined (K) is greater than two, the new image element data value is added to the data value of the input picture element, for

  thus perform an enlargement corresponding to the zoom ratio (R).

  In the operating state of Table 2, the zoom ratio (R) is 0.85. Here, if the whole part examined (K) is less than one, the picture element data is not output and the data value of the next picture element is output, so

  perform a reduction corresponding to the zoom ratio (R).

  However, the circuit for implementing this enlargement / reduction process is very complicated, and synchronization control for high speed processing is difficult. In addition, the circuit is expensive and in the range of the enlargement / reduction ratio cannot be easily extended or otherwise modified. Another conventional technique is disclosed in Japanese published patent application N hei 2-132963, which is shown in Figures 2A to 2D. Referring to Figure 2A, reference numerals 25 and 26 denote FIFO memories A and B each having a capacity of one line from the main analysis direction, for example, 4.752 pixels (16 pels / mm x 297 mm, i.e. the length of an A4 sheet). As shown in Figure 2B, a memory write operation is performed when write transfer signals / AWE and / BWE are at the low level, and memory read operation is performed when write transfer signals reading / ARE and / BRE are at the low level. In addition, the output of FIFO memory A is in a high impedance state when its read transfer signal (/ ARE) is high, and the output of FIFO memory B is in a

  high impedance state when its read transfer signal / BRE is high.

  Thus, the respective outputs of a FIFO memory A and of a FIFO memory B are delivered in a wired OR state (DOUT). In FIFO memories 25 and 26, an inner cursor progresses in accordance with a write address counter and a read address counter which are actuated by a WCK write clock and an RCK read clock, respectively, as shown in Figure 2C. Therefore, the input image data is reduced, when with the image data synchronization signal VCLK (Din), which is divided by a speed multiplier (RMP1) 27 is applied to the clock port of the write address memory 30 and the synchronization signal VCLK which is likewise divided by a speed multiplier (RMP2) 28 is applied to the read clock port of the read address memory 31 Conversely, the input image is enlarged if the applied clock signals are reversed. Thus, the FIFO memories A and B perform alternately read and write operations. In addition, a write address counter 30 and a read address counter 31 of the FIFO memories 25 and 26 are structured so that a counting is carried out by a clock for the section where the transfer signals ( WE and RE) are at low level, and are initialized (reset) for a "low" logic state of an RST restoration signal. For example, as shown in Figure 2D, after applying an RST pulse (the reverse synchronization signal / HSYNC from the main analysis direction), image data from the picture element nl to the picture element nl + m are written during the "low" logic state of the write transfer signals of the FIFO memories A and B (/ AWE and / BWE). Then, picture element data of the picture element n2 + m is read during the "low" logic state of the read transfer signals (/ ARE and / BRE). As a result, the write data becomes the data of

  reading, as shown in Figure 2D.

  The method described above controls an image data output synchronization signal at the point of reading / writing the image data from / to a line memory so as to perform enlargement or reduction, which can be obtained steadily at the 1% level. However, the circuit for obtaining this enlargement / reduction operation (i.e. at the 1% level) is very complicated. In addition, in order to perform enlargement and reduction over a wider range of ratios

  zoom (above approximately 25% to 400%), the assembly must be physically modified.

  Therefore, an object of the present invention is to provide a method of enlarging / reducing image data in a digital image processing system, for quickly delivering image data of the reproduction or reduction ratio. desired with reference to data stored in a look-up table

  having a low capacity, each time a user changes a zoom ratio.

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  Another object of the present invention is to provide a circuit suitable for the

  implementation of the above method.

  To achieve the first aforementioned goal, there is provided a method of enlarging / reducing image data in a digital image processing system which includes a look-up table in which a small amount of data for use during a enlargement / reduction is stored and a memory for use during enlargement / reduction, and which enlarges / reduces input image data in accordance with a zoom ratio specified by the user, the method comprising the steps of to: (a) divide the zoom ratio indicated by the user by one and calculate the quotient and the rest of the division; (b) reducing image data with reference to the data stored in the look-up table, if the quotient calculated during step (a) is less than one; (c) enlarging the image data with reference to the data stored in the consultation table, if the quotient calculated during step (a) is greater than one and if the remainder is not zero; (d) carry out a simple enlargement process if the quotient calculated during step (a) is greater than one and if the remainder is zero; and (e) write the enlargement / reduction data calculated during the

  steps (a) to (d) in memory.

  To achieve the aforementioned second goal, an enlargement / reduction circuit is provided for enlarging and reducing image data applied to a digital image processing system and delivering an image corresponding to a zoom ratio designated by the user. , the circuit comprising: a first memory for storing a look-up table for use during enlargement / reduction; a microprocessor for calculating enlargement / reduction data corresponding to the zoom ratio, using the look-up table stored in the first memory; a second memory for temporarily storing, during the calculation of the enlargement / reduction data by the microprocessor, the enlargement / reduction data of the look-up table and enlargement / reduction data for a quantity of a calculated line by the microprocessor of the first and second line memories for storing the input image data to be enlarged / reduced, on the scale of an analysis line, respectively, a third memory for carrying out enlargement / reduction using the enlargement / reduction data stored in the second memory; a first counter for counting a synchronization signal of the image data in order to write the units

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  an image data analysis line, at predetermined addresses of the first and second line memories; a second counter for counting the image data synchronization signal to output the data from the third memory as addresses of the first and second line memories, so that data can be written to the third memory in the microprocessor and so that an enlargement / reduction can be performed with reference to the zoom ratio designated by the user during an analysis operation, and a frequency divider to frequency divide a line synchronization signal so that the read and write operations of the first and second line memories can be performed

alternately.

  The foregoing objects, as well as other advantages of the present invention, will become apparent

  better from the detailed description of a preferred embodiment thereof with reference

  to the accompanying drawings in which: Figure 1 illustrates the concept of a conventional image data enlargement / reduction method; Figures 2A to 2D show conventional image data enlargement / reduction circuits and the operating waveforms thereof; Figure 3 illustrates the concept of enlarging and reducing image data according to the present invention; Figure 4 shows an image data enlargement / reduction processing circuit according to the present invention; Figures 5A to 5K show operating waveforms of different parts of the circuit shown in Figure 4; Figure 6A shows a look-up table for use during reduction, and Figure 6B shows magnification data calculated using the look-up table; Figure 7 is a flowchart showing the image data enlargement / reduction method of the present invention; Figure 8 is a flowchart showing the normalized enlargement / reduction process with reference to Figure 7; Figure 9 is a flowchart showing the reduction process of Figure 7, with reference to the look-up table;

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  Figure 10 is a flowchart showing the enlargement process of Figure 7, with reference to the look-up table, and Figure 11 is a flowchart showing the enlargement process

  simplified with reference to Figure 7.

  With reference to FIG. 3, it can be seen that, in the present invention, the writing data of the line memory are the same, independently of the zoom ratio, but that the reading data are controlled according to the zoom ratio, in contrary

  to the image data enlargement / reduction technique in Figure 1.

  Figure 4 shows an enlargement / reduction circuit of image data for use in a digital image processing system according to the present invention. The circuit of Figure 4 basically comprises means of calculating enlargement / reduction data for calculating enlargement / reduction data to be processed according to an actual reproduction operation by recognizing a zoom ratio defined by a user, and enlargement / reduction processing means for carrying out enlargement / reduction using the enlargement / reduction data calculated by the data calculation means

enlargement / reduction.

  The means for calculating enlargement / reduction data comprise a first memory, for example, a ROM 102, for storing an enlargement / reduction consultation table, a microprocessor 101 for calculating enlargement / reduction data using lookup table data stored in ROM 102, and a second memory, such as RAM 103, for temporarily storing lookup table data for use in enlargement / reduction operations and enlargement data /reduction

  calculated by microprocessor 101.

  Furthermore, the enlargement / reduction processing means comprise first and second line memories 601 and 602 for storing image data of a line in the main analysis direction in which, for example, the number of image elements is 4752 pels / line assuming a resolution of 400DPI (16 pels / mm) and a sheet in A4 format (length: 297 mm), a third memory, for example, a RAM 603 zoom, to perform a enlargement / reduction using enlargement / reduction data stored in RAM 103, a first counter, for example, a write address counter 604, for counting a synchronization signal (VCLK) of the image data of so that a line of image data in the main analysis direction, i.e. the direction of outputting image data from a charge coupled device, can be written to a predetermined address of the first and second mem lines 601 and 602, a second counter, for example, a zoom address counter 605, for counting the image data synchronization signal (VCLK) in order to output data from the zoom RAM 603 as address of the first and second line memories 601 and 602 so that data can be written to the zoom RAM 103 by the microprocessor 101 or an enlargement / reduction can be carried out in accordance with a predetermined zoom ratio during an analysis operation , and a frequency divider, for example, a D flip-flop 615, for dividing the frequency of a line synchronization signal so that the read / write operations of the first and second line memories 601 and

  602 can be performed alternately.

  The enlargement / reduction processing means also comprise first buffer memory means, for example, buffer memories 607, 608, 609 and 610, which serve as a path for designating a write and read address in

  the first and second memories 601 and 602, second memory means

  buffer, for example, buffer memories 611 and 613, which serve as a path for writing image data to be enlarged / reduced in the first and second line memories

  601 and 602, third means forming a buffer memory, for example, memories-

  buffers 612 and 614, which serve as a path for outputting the enlarged / reduced image data read from the first and second line memories 601 and 602, and fourth buffer means, for example, buffer memory 606, which serve as a path for the microprocessor 101 to read / write data from the

RAM zoom 603.

  In addition, the enlargement / reduction processing means further comprise first to fifth inverters 616 to 620, first to fourth AND doors 621 to

  624, and first and second doors OR 625 and 626.

  Figures SA to 5K show the waveforms of different parts of the circuit shown in Figure 4. Figure 5A shows an analysis signal applied to the first, second, fourth and fifth inverters 616, 617, 619 and 620 and to the erase port of D flip-flop 615. Figure 5B represents a line synchronization signal (/ LSYNC) applied to the second AND gate 622, to the clock port of flip-flop D 615 Il 2719404 and to erase port of the write address counter 604. FIG. 5C represents a validation signal delivered from the port Q of the D flip-flop 615. FIG. 5D represents a reverse validation signal delivered from the port / Q of the D flip-flop 615. Figure SE represents an image data validation signal (/ VDEN) applied to the third inverter 618. Figure 5F represents an inverted synchronization signal (/ VCLK) applied to the first and second OR gates 625 and 626, to the third gate ET 623, and to the clock port of the write address counter 604. Figure 5G shows DIN image data applied to be enlarged or reduced. Figure 5H shows the signal

  address deletion from the zoom RAM (/ CSICLR) applied to the second door ET 622.

  Figure 51 shows a zoom RAM selection signal (/ CS1) applied to the first and third ET doors 621 and 623. Figure 5J shows the zoom RAM read signal (/ CS1RD) applied to a DIR terminal in the memory - buffer 606, at the output enable (read) port of the zoom RAM 603, and at the fourth AND gate 624. Figure 5K represents the write signal of the zoom RAM (/ CS1WR) applied to the port of

  RAM 603 write validation.

  FIG. 6A represents an embodiment of a consultation table for a

  use during an enlargement / reduction in the case where the zoom ratio is 85%.

  Figure 6B shows part of the enlargement / reduction data calculated by

  microprocessor 101 in the case where the zoom ratio is 185%.

  Figure 7 is an explanatory flow diagram of the image data enlargement / reduction processing method according to the present invention for use in a digital image processing system. Step 10 is a normalized enlargement / reduction processing step to perform a normalized enlargement / reduction with respect to image data which is applied when an initial operation is performed. Steps 20 and 40 are steps of dividing the enlargement / reduction ratio, executed if the zoom ratio is set by a user, to calculate the quotient and the rest by dividing the modified ratio by one. Steps 50 and 60 are executed to perform a reduction with respect to data stored in a look-up table, if the quotient calculated during steps 20 and 40 is less than one. steps 50, 70 and 80 are first enlargement steps for carrying out an enlargement with respect to data stored in a look-up table, if the quotient calculated during steps 20 and 40 is greater than one and the rest calculated at during step 70 is not zero. Steps 50, 70 and 90 are seconds

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  enlargement steps to carry out a simple enlargement, if the quotient calculated during steps 20 and 40 is greater than zero and the remainder calculated during step 70 is zero. Step 100 is a data writing step for writing enlargement / reduction data calculated via steps 10 to 90 into a memory for use, during enlargement / reduction. Steps 110 and 120 are data verification steps to check whether the enlargement / reduction data which is read is identical to the initial data and then

perform an analysis operation.

  An operation of the circuit of the present invention will be explained with reference

in Figures 3 to 11.

  First, the basic concept of enlargement / reduction of the present invention can be explained with reference to Figure 3, as follows. When image data is written to a line memory, as shown in reduction (b) and enlargement (c) in Figure 3, the writing operation is performed by the synchronization signal (VCLK) of a input image signal. Then the image data is

  enlarged / reduced in the line memory.

  With reference to FIG. 4, a look-up table for carrying out the enlargement / reduction in steps of 1% is stored in the ROM 102, and the microprocessor 101 reads the look-up table stored in the ROM 102 to the RAM 103 in a manner calculating enlargement / reduction data corresponding to the ratio chosen by a user. Then, the calculated enlargement / reduction data are stored in a predetermined area of the RAM 103. Thus, the microprocessor 101 reads the data from the look-up table of the ROM 102 only when the zoom ratio chosen by a user requires a reference of the look-up table, and stores the result in RAM 103. Here, 100 bytes are sufficient for the area of the

  RAM 103 o the consultation table is memorized.

  Assuming a resolution of 400 DPI, a maximum number of picture elements for an analyzed line is 4752. Therefore, when enlargement / reduction data corresponding to 4752 picture elements is generated by the microprocessor 101 and the RAM 103, enlargement / reduction data is read from RAM 103 and written to the zoom RAM 603. At this time, the microprocessor 101 does not perform selective access to the enlargement / reduction data in the zoom RAM 603 using an address bus, but addresses the zoom 603 RAM using an address generated by the

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  zoom address counter 605 with a predetermined address assigned to each zone of a memory. In addition, enlargement / reduction data can be written and

  read from the microprocessor 101 via the buffer memory 606.

  The operations described above can be carried out when the analysis signal s of FIG. 5A is low, which corresponds to a zoom data transfer section. Here, / CSlCLR (Figure 5H) is a signal to align an address to zero when data is read / written to / from RAM zoom 603. In addition, / CS1 (Figure 5I) and / CS1RD (Figure J) are low to read data from zoom RAM 603, and CS1 (Figure 5I) and / CS1WR (Figure 5K) are low to write data to zoom RAM 603. When enlargement / reduction data is written to zoom RAM 603 , the preparation for an enlargement / reduction is fully completed. When the analysis signal of Figure A is low, image data is not output and the first and second memories

  601 and 602 are put into service.

  When the analysis signal of Figure SA is high, the validation signal shown in Figure 5C is also high and the inverted validation signal shown in Figure 5D is brought to the low level by the posterior flank of the first pulse of the line synchronization signal (/ LSYNC) of Figure 5B. Then, when the image data enable signal (/ VDEN) shown in Figure 5E is brought to the low level, image data is output by a unit of a picture element in accordance

  to the reverse synchronization signal (/ VCLK) shown in Figure 5F. At this time, since the buffer memories 608 and 612 are validated,

  enlargement / reduction data delivered from the RAM zoom 603 via the

  buffer 608 are issued as an address to the first line memory 601.

  The first line memory 601 operates in an image data read mode in which the enlarged / reduced image data corresponding to the address is delivered via the buffer memory 612. Here, as address value of the first line memory 601, is used an output value of the zoom address counter 605 which counts after being reset to zero by the line synchronization signal of FIG. 5B and triggered by the inverted synchronization signal NVCLK of Figure 5F. In addition, the buffers 609 and 613 are enabled so that an output value of the write address counter 604 is applied to an address of the second line memory 602 and the second line memory 602 operates according to an image data writing mode in which image data is synchronized to the reverse synchronization signal / VCLK of Figure 5F and applied to the second line memory 602. The operation described above

  corresponds to state 1 of Figure 5G.

  In the meantime, if the second pulse of the line synchronization signal s / LSYNC represented in FIG. 5B is applied, the validation signal of FIG. 5C is brought to low level and the inverted validation signal of FIG. 5D found at

  high level. Consequently, in a converse manner with respect to state 1, the memories-

  buffers 607 and 611 are enabled and an output value of the write address counter 604 is applied to an address of the first line memory 601. As a result, the first line memory 601 operates in a write mode of image data in which image data is synchronized to the reverse synchronization signal / VCLK of Figure 5F and applied to the first line memory 601. Next, the buffers 610 and 614 are enabled and data d enlargement / reduction delivered by the RAM zoom 603 are applied as an address. As a result, the second line memory 602 operates in an image data read mode in which the enlarged / reduced data is output via the buffer memory

  614. The operation described above corresponds to state 2 of Figure 5G.

  The first and second line memories 601 and 602 alternately execute states 1 and 2 under the control of the line synchronization signal / LSYNC of FIG. 5B which is applied continuously. When an entire analysis operation is completed, the analysis signal of Figure 5A is at the low level in preparation for

  performing enlargement / reduction and other functions.

  The enlargement / reduction process using a look-up table can

  be explained with reference to Figures 7 to 11, as follows.

  Referring to Figure 7, a normalized enlargement / reduction (100%) is performed during step 10 as shown in Figure 8, and it is determined whether the user specifies a zoom ratio during step 20. If an analysis start command is issued without fixing the zoom ratio during step 20, enlargement / reduction data are written to the zoom RAM 603 (step 100). Furthermore, if step 20 results in a new zoom ratio, the zoom ratio is divided by a

  (step 40) and it is determined whether the quotient is greater than one (step 50).

  If the quotient is less than one during step 50, a reduction is made with reference to a look-up table as shown in Figure 9 (step 60). If the quotient is greater than one during step 50, it is determined whether the remainder is zero (step). If the remainder is not zero during step 70, an enlargement is carried out with reference to a look-up table as shown in FIG. 10 (step 80). If the remainder is zero, a simple enlargement is carried out as shown in Figure 11

(step 90).

  If enlargement / reduction data is arranged after performing step 90, the enlargement / reduction data is written to the zoom RAM 603 (step 100). Then, the data written to the zoom RAM 604 is read and it is checked whether the data read agrees with the initial data (step 110). When the verification

  is completed, an analysis operation is performed (step 120).

  A standardized enlargement / reduction can be explained with reference to Figure 8, as follows. A TEMP enlargement / reduction data storage area in RAM 103 is established in Z_ADD and a reference data VALUE for

  calculating enlargement / reduction data is set to be zero (step 12).

  Then, the VALUE is written in Z_ADD (step 14) and then, Z_ADD and VALUE

  are each increased by a step 16).

  During step 16, the maximum number of picture elements END_ADD in units of an analysis line in the main analysis direction and Z_ADD are compared. If ENDADD is less than Z_ADD, step 18 returns to step 14, and if

  END_ADD is greater than ZADD, the process ends.

  A reduction process having a look-up table as a reference can be explained with reference to Figure 9, as follows. Referring to Figure 9, data corresponding to the zoom ratio indicated by a user are read from enlargement / reduction data stored in the look-up table and the read data converted into data in units of a line according to a reduction ratio, in

  thereby providing data for reduction.

  The actual LDATA address of the lookup table stored in ROM 102

  is calculated using the remainder calculated in step 40 of Figure 7 (step 61).

  A TEMP enlargement / reduction data storage area in RAM 103 is established in Z_ADD, and the remainder calculated in step 40 of Figure 7 is established in

LP_CNT (step 62).

  During step 63, the value of the look-up table is written from L_DATA calculated during step 61 in Z_ADD. Then L_DATA and Z_ADD are

  each increased by one (step 64).

  During step 65, LP_CNT is increased by one and the result is compared to zero (step 66). If the value LP_CNT is not zero, the process returns to step 63 and if LP_CNT is zero, the data is extended as much as the maximum number of picture elements of a line in the direction of main analysis corresponding to a rate of

  reduction (step 67). Thus, the operation ends.

  An enlargement process having a look-up table as a reference can be explained with reference to Figure 10 as follows. Referring to FIG. 10, data corresponding to the zoom ratio designated by a user are read from enlargement / reduction data stored in the look-up table, and the read data converted into data units of a line d analysis according to an enlargement report, thus delivering data to carry out a

enlargement.

  The actual address (L DATA) of the lookup table stored in ROM 102 is calculated using the remainder calculated in step 40 of Figure 7 (step 811). Then, an enlargement / reduction data restore area (TEMPO) in RAM 103 is established in Z_ADD, and a reference data (VALUE) for calculating enlargement / reduction data is established as zero. Then, the remainder calculated during step 40 of Figure 7 is established in LPCNT, and a time zone (TEMPI) of RAM 103 in which the look-up table data

  ROM 102 correspondents are established in LDATA (step 812).

  In step 813, the L_DATA calculated in step 811 are written

  in L_ADD, and L_DATA and L_ADD are each increased by one (step 814).

  During step 815, LP_CNT is decreased by one and the result is compared to zero (step 816). If LP_CNT is not zero, the process returns to step 813 so as to repeat the process until the value LP_CNT reaches zero. If LP_CNT is zero, the quotient calculated during step 40 of Figure 7 is established in LP_CNT and TEMPI

is established in LADD (step 817).

  In step 818, VALUE is written to Z_ADD and Z_ADD is increased by one (step 819), and LPCNT is decreased by one (step 820) so as to determine whether the LP_CNT is zero (step 821). If LPCNT is not zero, the process returns to step 818, and if LPCNT is zero, the quotient calculated during step 40 of Figure 7 is established again in LP_CNT (step 822). Then, we determine if L_ADD is equal to VALUE

(step 823).

  In step 824, if L_ADD is not equal to VALUE, the process returns to step 818. If L_ADD is equal to VALUE, LADD is increased by one in order to read the next data value from the table consultation (step 824). Then VALUE is

  written in Z_ADD (step 825) and ZADD are each increased by one (step 826).

  Next, it is determined whether the result of TEMPI subtraction from the current LADD is equal to the remainder calculated in step 40 of Figure 7 (step 827). If the result is different from the rest, the process returns to step 818. If the result is equal to the rest, the data is extended as much as the maximum number of picture elements of a line in the direction of analysis main corresponding to an enlargement ratio using the enlargement / reduction data produced so far (step 828). So the operation

ends.

  A simple enlargement can be explained with reference to Figure 11 as follows. An enlargement / reduction data area (TEMP) in RAM 103 is set in ZADD, and reference data (VALUE) for calculating enlargement / reduction data is set as zero (step 91). Then, the quotient calculated during step 40 of Figure 7 is established in LP CNT (step 92). Then,

  VALUE is written to Z ADD (step 93) and Z_ADD is increased by one (step 94).

  In step 95, LPCNT is decreased by one and the result is compared to zero (step 96). Then, if the result is not zero, the process returns to step 93, and if the result is zero, VALUE is increased by one (step 97). Then, the maximum number of picture elements END_AD of an amount equal to one line of data in the main analysis direction is equal to ZADD (step 98). If END_AD is different from Z_ADD, the

  process returns to step 93, and if END_AD is equal to Z_ADD, the process ends.

  The enlargement / reduction process explained with reference to the flowcharts shown in Figures 7 to 11 can be explained with respect to an 85% reduction and an 185% enlargement, with reference to the look-up table shown in the Figures 6A and 6B, as follows. Since lookup table data from 1% to 99% is sequentially stored in the lookup table, the starting address where lookup table data corresponding to 85% is stored, must be calculated first. When the look-up table address calculation is complete, 85 look-up table values are read from the look-up table starting address corresponding to 85% in an enlargement / reduction data memory area RAM 103 TEMP and the read data are extended for a reduction of the data by an amount equal to one, line of analysis, since the reduction having a look-up table as a reference represented in FIG. 9 uses the data of table

without modification.

  Furthermore, for an enlargement to 185%, the data of the consultation table corresponding to 85% is read in an arbitrary area TEMP1 of the RAM 103. Then, the simple enlargement represented in FIG. 11 is carried out with respect to o0 a 100% enlargement, and the enlargement having the consultation table represented

  in Figure 10 as a reference is made to an 85% magnification.

  As described above, an enlargement / reduction of image data and a circuit of the present invention in a digital image processing system performs enlargement / reduction of image data using a small amount of table data of consultation, thus corresponding to a wide range of enlargement / reduction requests by a user and simplifying the structure of the circuit. In addition, the enlargement / reduction data is calculated by a microprocessor, and a

  zoom ratio can be easily extended in accordance with a software modification.

  In addition, a more stable enlargement / reduction can be carried out since an enlargement / reduction is carried out via a RAM. In addition, if the RAM is replaced by a memory having a fast access time, an enlargement / reduction can be easily applied for processing at high speed. In addition, the enlargement / reduction data are calculated at each point o

  the zoom ratio is changed and written to the enlargement / reduction RAM.

  Then, the data is read again and checked to avoid a faulty copy that could be caused by a malfunction (I / O error) of a memory device. As a result, the cost of copying can be reduced and a state of

  circuit operation can be checked, thereby recognizing an error state.

Claims (11)

  1. A method of enlarging / reducing image data in a digital image processing system which includes a look-up table in which a small amount of data is stored for use during enlargement / reduction and a memory for use during enlargement / reduction, and which enlarges / reduces input image data in accordance with a zoom ratio indicated by a user, the method being characterized in that it comprises the steps consisting in: (a) divide the zoom ratio designated by the user by one and calculate the quotient and the rest of it, (b) reduce the image data compared to the data stored in the consultation table if the calculated quotient during said step (a) is less than one, (c) enlarge the image data with respect to the data stored in the look-up table, if the quotient calculated during said step (a) is greater than one and if the remainder of it is not zero, (d) carry out a simple enlargement treatment if the quotient calculated during said step (a) is greater than one and if the remainder of it ci is zero, and (e) write the enlargement / reduction data calculated during the said steps (a) to (d) in memory.   2. A method of enlarging / reducing image data according to claim 1, characterized in that said consultation table stores data for enlargement and reduction operations corresponding to ratios of 1% to 99% in 1% increments.   3. Image data enlargement / reduction method according to claim 1, characterized in that it further comprises the step of reading said written enlargement / reduction data and checking whether the data read are identical to the initial data.   4. Image data enlargement / reduction method according to claim 1, characterized in that said reduction step reads the data corresponding to the zoom ratio indicated by the user from the enlargement / reduction data stored in said lookup table, converts the read data into a data analysis line corresponding to the reduction ratio, and   calculates the enlargement / reduction data for a reduction process.   5. Image data enlargement / reduction method according to claim 1, characterized in that said first enlargement step reads the data corresponding to the zoom ratio indicated by the user from the stored enlargement / reduction data. in said consultation table, converts the data read in a data analysis line corresponding to the enlargement report, and calculates the data   enlargement / reduction for an enlargement process.   6. Magnification / reduction circuit for enlarging and reducing image data applied to a digital image processing system and delivering an image corresponding to a zoom ratio indicated by the user, the circuit being characterized in that it comprises: a first memory (102) for storing a look-up table for use during enlargement / reduction, a microprocessor (101) for calculating enlargement / reduction data corresponding to the zoom ratio, using the consultation table stored in said first memory, a second memory (103) for temporarily storing, during the calculation of the enlargement / reduction data by said microprocessor, the enlargement / reduction data of said consultation table and the data of enlargement / reduction for a quantity of a line calculated by said microprocessor, of the first and second line memories (601, 602) to store the input image data to be enlarged / reduced, in units of an analysis line, respectively, a third memory (603) for carrying out enlargement / reduction using the enlargement / reduction data stored in said second À À memorized, a first counter (604) for counting a synchronization signal of the image data in order to write said units of an image data analysis line, in predetermined addresses of said first and second line memories, a second counter (605) for counting the image data synchronization signal for outputting data from said third memory as addresses of said first and second line memories, so that data can be written in said third memory by said microprocessor and so that an enlargement / reduction can be carried out taking into account said zoom ratio designated by the user eur during an analysis operation, and a frequency divider (615) for frequency dividing a line synchronization signal so that the read and write operations of said signals   first and second line memories are performed alternately.   7. Image data enlargement / reduction circuit according to claim 6, characterized in that it further comprises: a first buffer memory (607, 608, 609, 610), for designating a write address and reading from said first and second line memories, a second buffer memory (611, 613) for writing image data to be enlarged / reduced in said first and second line memories, a third buffer memory (612, 614) for outputting the enlarged / reduced image data read from said first and second line memories, and a fourth buffer memory (606) for enabling said microprocessor to   read / write data from said third memory.   8. Image data enlargement / reduction circuit according to claim 6, characterized in that said look-up table stores data for enlargement and reduction operations corresponding to ratios of 1% to 99% in 1% increments.   9. Image data enlargement / reduction circuit according to claim 6, characterized in that it reads the data corresponding to the zoom ratio designated by the user from the enlargement / reduction data stored in said table. consultation, converts the data read in a data analysis line according to the reduction ratio, and calculates enlargement / reduction data for a process reduction.   10. Image data enlargement / reduction circuit according to claim 6, characterized in that it reads the data corresponding to the zoom ratio designated by the user from the enlargement / reduction data in said consultation table. , converts the data read in a data analysis line according to the enlargement ratio, and calculates enlargement / reduction data for a enlargement processor.   The image data enlargement / reduction circuit according to claim 10, characterized in that said enlargement / reduction data for said enlargement process are calculated by a simple enlargement processing and a processing.   enlargement having said consultation table as a reference.