FR2714765B1 - Procédé de réalisation d'une connexion électrique entre deux couches conductrices. - Google Patents

Procédé de réalisation d'une connexion électrique entre deux couches conductrices.

Info

Publication number
FR2714765B1
FR2714765B1 FR9315893A FR9315893A FR2714765B1 FR 2714765 B1 FR2714765 B1 FR 2714765B1 FR 9315893 A FR9315893 A FR 9315893A FR 9315893 A FR9315893 A FR 9315893A FR 2714765 B1 FR2714765 B1 FR 2714765B1
Authority
FR
France
Prior art keywords
making
electrical connection
conductive layers
conductive
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9315893A
Other languages
English (en)
Other versions
FR2714765A1 (fr
Inventor
Le Contellec Michel
Prolonge Alain
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sagem SA
Orange SA
Original Assignee
France Telecom SA
Sagem SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA, Sagem SA filed Critical France Telecom SA
Priority to FR9315893A priority Critical patent/FR2714765B1/fr
Publication of FR2714765A1 publication Critical patent/FR2714765A1/fr
Application granted granted Critical
Publication of FR2714765B1 publication Critical patent/FR2714765B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
FR9315893A 1993-12-30 1993-12-30 Procédé de réalisation d'une connexion électrique entre deux couches conductrices. Expired - Fee Related FR2714765B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9315893A FR2714765B1 (fr) 1993-12-30 1993-12-30 Procédé de réalisation d'une connexion électrique entre deux couches conductrices.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9315893A FR2714765B1 (fr) 1993-12-30 1993-12-30 Procédé de réalisation d'une connexion électrique entre deux couches conductrices.

Publications (2)

Publication Number Publication Date
FR2714765A1 FR2714765A1 (fr) 1995-07-07
FR2714765B1 true FR2714765B1 (fr) 1996-02-02

Family

ID=9454594

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9315893A Expired - Fee Related FR2714765B1 (fr) 1993-12-30 1993-12-30 Procédé de réalisation d'une connexion électrique entre deux couches conductrices.

Country Status (1)

Country Link
FR (1) FR2714765B1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4024626A (en) * 1974-12-09 1977-05-24 Hughes Aircraft Company Method of making integrated transistor matrix for flat panel liquid crystal display
US4057824A (en) * 1976-04-30 1977-11-08 Rca Corporation P+ Silicon integrated circuit interconnection lines
DE3424085A1 (de) * 1983-06-29 1985-01-17 Citizen Watch Co., Ltd., Tokio/Tokyo Verfahren zur herstellung von hoechstminiaturisierten duennschichtdioden
JPS60178667A (ja) * 1984-02-27 1985-09-12 Fujitsu Ltd 半導体装置の製造方法
FR2586859B1 (fr) * 1985-08-27 1987-11-20 Thomson Csf Procede de fabrication d'un transistor de commande pour ecran plat de visualisation et element de commande realise selon ce procede
JPH01117068A (ja) * 1987-10-29 1989-05-09 Toshiba Corp 薄膜半導体素子

Also Published As

Publication number Publication date
FR2714765A1 (fr) 1995-07-07

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Legal Events

Date Code Title Description
AU Other act affecting the ownership or exploitation of an industrial property right
ST Notification of lapse