FR2668622A1 - Circuit de controle d'acces a une memoire. - Google Patents

Circuit de controle d'acces a une memoire. Download PDF

Info

Publication number
FR2668622A1
FR2668622A1 FR9013300A FR9013300A FR2668622A1 FR 2668622 A1 FR2668622 A1 FR 2668622A1 FR 9013300 A FR9013300 A FR 9013300A FR 9013300 A FR9013300 A FR 9013300A FR 2668622 A1 FR2668622 A1 FR 2668622A1
Authority
FR
France
Prior art keywords
memory
data
dynamic memory
block
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR9013300A
Other languages
English (en)
French (fr)
Other versions
FR2668622B1 (enrdf_load_stackoverflow
Inventor
Fantino Yves
Galliard Philippe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Priority to FR9013300A priority Critical patent/FR2668622A1/fr
Publication of FR2668622A1 publication Critical patent/FR2668622A1/fr
Application granted granted Critical
Publication of FR2668622B1 publication Critical patent/FR2668622B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FR9013300A 1990-10-26 1990-10-26 Circuit de controle d'acces a une memoire. Granted FR2668622A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9013300A FR2668622A1 (fr) 1990-10-26 1990-10-26 Circuit de controle d'acces a une memoire.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9013300A FR2668622A1 (fr) 1990-10-26 1990-10-26 Circuit de controle d'acces a une memoire.

Publications (2)

Publication Number Publication Date
FR2668622A1 true FR2668622A1 (fr) 1992-04-30
FR2668622B1 FR2668622B1 (enrdf_load_stackoverflow) 1995-01-13

Family

ID=9401599

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9013300A Granted FR2668622A1 (fr) 1990-10-26 1990-10-26 Circuit de controle d'acces a une memoire.

Country Status (1)

Country Link
FR (1) FR2668622A1 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2120912A1 (es) * 1997-01-29 1998-11-01 Telesincro S A Circuito integrado de aplicacion especifica.

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3431770A1 (de) * 1984-08-29 1986-03-13 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur sicherung von wichtigen informationen in speichereinheiten mit wahlweisem zugriff, insbesondere solchen aus ram-bausteinen
JPS62276643A (ja) * 1986-05-26 1987-12-01 Fujitsu Ltd メモリ制御方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3431770A1 (de) * 1984-08-29 1986-03-13 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur sicherung von wichtigen informationen in speichereinheiten mit wahlweisem zugriff, insbesondere solchen aus ram-bausteinen
JPS62276643A (ja) * 1986-05-26 1987-12-01 Fujitsu Ltd メモリ制御方式

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, vol. 12, no. 163 (P-703), 18 mai 1988; & JP-A-62 276 643 (FUJITSU LTD) 01-12-1987 *
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, Rye Brook, New York, 5-8 octobre 1987, pages 157-159, IEEE, New York, US; D. MORGAN et al.: "The CVAX CMCTL, a CMOS memory controller chip" *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2120912A1 (es) * 1997-01-29 1998-11-01 Telesincro S A Circuito integrado de aplicacion especifica.

Also Published As

Publication number Publication date
FR2668622B1 (enrdf_load_stackoverflow) 1995-01-13

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