FR2654289A1 - Chrominance signal processing apparatus - Google Patents

Abstract

The apparatus is provided for demodulating signals which are FM modulated with a set of different frequencies on a carrier signal, in time division. The apparatus comprises input means (12) for receiving the carrier signal transporting the colour difference signals and a FM demodulation means (16) for FM demodulating the signals originating from the input means (12). The FM demodulation means (16) has a set of demodulation axes corresponding to the set of different frequencies.

Description

 The present invention relates generally to a chrominance signal processing apparatus and applies more particularly to a chrominance signal processing apparatus which processes FM modulated color difference signals on a time-division carrier signal, such as television signals from the SECAM system.

 As a color television system in use around the world, there are currently three systems, namely the NTSC system, the PAL system and the SECAM system. The SECAM system is used mainly in France and in certain countries of Eastern Europe. It is well known that in all color television systems, two color difference signals3 are transmitted, namely "RY" and "BY" instead of directly transmitting three chrominance signals R, G and B. Another signal of color difference, namely "VY" can be formed in television receivers by matrix processing on the two signals "RY" and "BY" above. In the SECAM system, the color difference signals "RY" and "BY" are alternately FM modulated for one horizontal scanning period over two of a composite color television signal, and are transmitted sequentially online.

 An FM modulation carrier with a frequency of 282fH (fH - 15.625 KHz) is used for the "R-Y 'signal. Another FM modulation carrier with another frequency 272fH is used for the" BY "signal. identify the "RY" signal and the "BY" signal, identification signals (hereinafter called ID signals) are placed in horizontal spot return periods just before the horizontal scanning periods. IDs are inserted in return porches of the respective periods of horizontal spot return, as well as in respective periods of return of vertical spot.

In the SECAM receivers, the color difference signals "R-Y" and "B-Y" are reproduced with reference to the ID signals.

 In the SECAM receivers, it is necessary to maintain the color difference signals "RY" and "BY" for a horizontal period (hereinafter referred to as 1H or 1H period) in order to synchronize them because they are modulated sequentially in line as described above. So far, the 1H delayed color difference signal is obtained for example using a glass delay line device. This glass delay line device was provided at an HF (high frequency) stage. As a result, a beat was formed between an undelayed signal and a delayed signal having passed through the glass delay line device.

 In addition, a fault known as line crawling phenomenon occurs on the receiver display screen.

 To avoid such a defect, it is best to delay them after FM demodulation from the composite color television signal in order to synchronize them with each other. One can thus use a DCC (charge coupled device) to effectively delay such demodulated color difference signals "R-Y" and "B-Y".

 It should be noted that the "R-Y" and "B-Y" signals of the SECAM system are FM modulated with different carrier frequencies, namely 282fH and 272fH. It is therefore necessary to use two FM modulators at different frequencies to obtain them in an example of SECAM receiver of the prior art.

 However, such a SECAM receiver using the two FM modulators has the drawback that it is of complex construction.

The object of the invention is therefore to create
- a simple chrominance signal processing device
- a chrominance signal processing apparatus, in which the carrier frequencies used for FM demodulation of color difference signals can be easily stabilized;
- a chrominance signal processing apparatus, in which the carrier frequencies for FM demodulation of the color difference signals can be automatically stabilized
- a chrominance signal processing apparatus for demodulating FM modulated signals on a carrier signal with a set of different frequencies divided in time, having an input circuit for receiving the carrier signal carrying the signals and an FM demodulator for demodulating the signals and which has a set of demodulation axes corresponding to 9 the set of different frequencies.

According to the invention, the apparatus for demodulating signals which are FM modulated with a set of different frequencies on a time division carrier signal, comprising
an input means for receiving the carrier signal carrying the signals; and
- FM demodulation means to demodulate
FM signals from the input means,
is characterized in that the FM demodulation means has a set of demodulation axes corresponding to the set of different frequencies.

 Various other characteristics of the invention will also emerge from the detailed description which follows.

 Embodiments of the object of the invention are shown, by way of nonlimiting examples, in the accompanying drawing.

 Fig. 1 is a block diagram illustrating a first embodiment of the chrominance signal processing apparatus according to the present invention.

 Fig. 2 is a block diagram illustrating a second embodiment of the chrominance signal processing apparatus according to the present invention.

 Figs. 3 and 4 are respectively explanatory diagrams for explaining FM demodulation operations used in the present invention.

 Fig. 5 is a circuit diagram showing in detail part of the block diagram of FIG. 2.

 Fig. 6 is a diagram showing an example of the reference signal generator illustrated in FIG. 5.

 Fig. 7 is a time diagram explaining an example of operation of the circuit shown in FIG. 5.

 The present invention is now described in detail with reference to Figs. 1 to 7. In all the figures, analogous or equivalent reference numbers or letters will be used to designate analogous or equivalent elements in order to simplify the explanation.

 Referring now to FIG. 1, there is described in detail a first embodiment of the chrominance signal processing apparatus according to the present invention. The chrominance signal processing apparatus is for example used to demodulate color difference signals from the SECAM system.

 In fig. 1, a composite color television signal comprising “RY” and “BY” color difference signals from the SECAM system is applied to a bell filter 12 on an input terminal 11. The bell filter 12 compensates for the characteristic of frequency response of the composite color television signal. The composite color television signal whose frequency response has thus been compensated for is applied in parallel to a first amplifier 13 and to a second amplifier 14.

 These amplifiers 13 and 14 are triggered by different trigger pulses GP1 and GP2.

The first trigger pulse GP1 actuates the first amplifier 13 during the horizontal scanning period, so that the horizontal scanning period of the composite signal is selectively extracted from the first amplifier 13. The second trigger pulse GP2 actuates the second amplifier 14 during a period corresponding to the ID signal.

 The composite signal of horizontal scanning period is applied to a color difference demodulator 16. In addition, the output of the second amplifier 14 is applied to an ID signal demodulator 17.

 The color difference signal demodulator 16 has an FM demodulator with two demodulation axes. These two demodulation axes correspond to the frequencies 282fH and 272fH respectively of the FM demodulation carriers. These two demodulation axes are switched for one horizontal period out of two by a line switching pulse LP applied to a terminal 18. The color difference signals "R-Y" and "B-Y" are thus sequentially demodulated FM in the demodulator 16.

 The color difference signal demodulator 16 has two manual biasing devices, such as variable resistors VR1 and VR2.

The variable resistors VR1 and VR2 are provided to stabilize the black levels of the color difference signals "RY" and respectively "BY". Thus, two control signals CSî and CS2 formed in the variable resistors VR1 and VR2 are applied to the demodulator of color difference signals 16.

 The color difference signals "RY" and "BY" thus demodulated FM are applied to a baseband processing circuit 19. The baseband processing circuit 19 includes 1H delay devices such as DCCs for delaying the color difference signals "RY" and "BY" as well as a matrix circuit analogous to the baseband processing circuit of the usual type. Thus, simultaneous processing of the color difference signals "R-Y11 and" BY "is performed using the 1H delay devices. The matrix circuit provides the third color difference signal" VY "by performing matrix processing on the color difference signals "RY and" BY ".

 The signal demodulator ID 17 has an FM demodulator comprising a single-axis FM demodulator of the usual type. Thus, the ID signals are demodulated FM in the demodulator 17. The level of the ID signal is stabilized by a third control signal CS3 formed by a variable resistor VR3. The signal ID coming out of the demodulator ID 17 is used for online switching and synchronization, and for phase control of the switching pulse.

 According to the first embodiment of the chrominance signal processing apparatus according to the invention, the FM demodulation of the two color difference signals "R-Y" and "B-Y" is carried out by a single FM demodulator. Thus, the first embodiment of the apparatus for processing chrominance signals according to the invention advantageously has a simple embodiment.

 Referring now to FIG. 2, a second embodiment of the chrominance signal processing apparatus according to the present invention will be described in detail.

 As seen in fig. 2, the second embodiment of the chrominance signal processing apparatus has an arrangement similar to the first embodiment (see FIG. 1), except that the color difference signal demodulator 16 and the demodulator ID signals 17 receive automatic control signals from an automatic control circuit 20. The automatic control circuit 20 forms three control signals CS1, CS2 and CS3, as described below. The control signals CS1 and CS2 are applied to the color difference signal demodulator 16, while the control signal CS3 is applied to the signal demodulator ID 17.

 The two-axis demodulation performed in each of the color difference signal demodulators 16 of the first and second embodiments will now be described in detail with reference to FIGS. 3 and 4.

Fig. 3 is a graph showing the two-axis FM demodulation characteristic of the color difference signal demodulator 16. It is assumed that the color difference signal demodulator 16 receives the line switching pulse
LP and the control signals CSî and CS2 in synchronism with the horizontal period of the composite television signal. These control signals CSî and CS2 establish a pair of free frequencies of a voltage controlled oscillator incorporated in a phase locked loop (BVP) circuit. Such a BVP circuit is usually supplemented to constitute FM demodulators such as the color difference signal demodulator 16 and the ID signal demodulator 17.

When the composite signal carrying the "BY" signal is introduced, the second control signal
CS2 coming from the automatic control circuit 20 is chosen to establish a first free frequency fOB (272fH) of the voltage-controlled oscillator. In accordance with the first free frequency fOB, a standard VOB level of a black color difference level used in a transmission source has also been restored to the frequency fOB. Therefore, the demodulated color difference signal "BY" varies around the standard VOB black level.

 When the composite signal carrying the signal "R-Y" is introduced, the first control signal CSî coming from the automatic control circuit 20 is chosen to establish a second free frequency fOR (- 282fH) of the voltage-controlled oscillator. In accordance with the second free frequency fOR, the same standard VOB level has also been restored. Therefore, the "B-Y" modulated color difference signal varies around the standard VOB black level.

 As seen from fig. 3, the color difference signals "R-Y" and "B-Y" varying around the same black level VOB are obtained by switching the free frequencies fOB and fOR of the voltage-controlled oscillator for one horizontal scanning period out of two. As a result, no DC level shift will occur between the "R-Y" and "B-Y" lines of the demodulated color difference signals.

 It will be noted that the free frequencies fOB and fOR of the voltage-controlled oscillator may become unstable due to the variation of certain parameters, such as a variation in temperature, a variation in time, etc.

 In the first embodiment of the chrominance signal processing apparatus, the free frequencies fOB and fOR of the voltage-controlled oscillator are stabilized by the first and second control signals CS1 and CS2. These control signals CSî and CS2 are adjusted manually by the variable resistors VR1 and VR2 (see fig. 1), while in the second embodiment of the chrominance signal processing apparatus, the free frequencies fOB and fOR of the voltage controlled oscillator are automatically stabilized by the control signals CSî and CS2 coming from the automatic control circuit 20 (see fig. 2).

 The ID signal demodulator 17 also has a voltage-controlled oscillator in its BVP circuit, similar to the color difference signal demodulator 16.

 The standard free frequency fOID of the voltage-controlled oscillator incorporated in the signal demodulator ID 17 is set in the middle of the free frequencies fOB and fOR mentioned above for the color difference signal demodulator 16.

Thus, the standard free frequency fOID is given by (fOB + fOR) / 2 (- 277fH). The ID signal demodulator 17 forms a standard VOID level in response to the standard free frequency fOID.

 Fig. 4 shows the FM demodulation characteristic of the ID 17 signal demodulator. Since the standard free frequency fOID is set to the frequency fOID, ie 277fH, the composite signal carrying the signal "BY" and its associated ID signal is applied and the ID signal with a VOID level lower than the standard VOID level is obtained, while another demodulated ID signal having a VOIR level higher than the standard VOID level when the ID signal associated with the signal "RY" is applied. The ID signals of different levels are then used to identify the color difference signals B-Y "and" R-Y ".

 ID signals associated with vertical spot return periods have minimum and maximum frequencies fmax and fmin determined in advance. The frequencies fmax and fmin are considerably higher and respectively lower than the frequencies fOB and fOR mentioned above, as shown in fig. 4. Thus, ID signals having a minimum level Vmin and a maximum level Vmax, as shown in FIG. 4, are restored in response to the input frequencies fmax and fmin.

 In the ID signal demodulator 17, two ID signals having different levels are thus demodulated by giving a control signal CS3 corresponding to the frequency fOID fOID - (fOB + fOR) / 2 - 277fHg coming from the automatic control circuit 20.

 Fig. 5 shows the details of the color difference signal demodulator 16 and the automatic control circuit 20 of the second embodiment as well as an interconnection between the circuits.

 The composite signals alternately having the color difference signals "BY" and "RY" are applied to a phase comparator 161 from the first amplifier 13. The composite signals are compared in phase with the oscillation signals fOB and fOR coming respectively of a voltage controlled oscillator (OCT) 162. The color difference signals "RY" and "BY" are thus brought alternately out of the phase comparator 161.

 These demodulated color difference signals "RY" and "BY" are applied in feedback to the OCT 162 via a low-pass filter (FPB) 163. As a result, the oscillation frequencies fOB and fOR of the OCT 162 are alternately locked in phase with the composite input signals. The demodulated color difference signals "R-Y" and "B-Y" are thus stabilized.

 In the present case, in order to switch the demodulation axes alternately for one horizontal period out of two, the line switching pulse LP is applied to the OCT 162 on a terminal 164.

The OCT 162 also has two terminals for receiving the first and second control signals CSî and CS2.

These terminals are alternately chosen by the line switching pulse LP.

 In addition, the oscillation signal of the OCT 162 is applied to the automatic control circuit 20. In the automatic control circuit 20, the oscillation signal of the OCT 162 is applied to a phase comparator 203 by l 'through a frequency divider 201 and a first switch 202. The automatic control circuit 20 further comprises a reference signal generator 204 which forms two reference signals of stable frequency. The reference signal generator 204 is also connected to the phase comparator 203 by means of a second switch 205. The second switch 205 alternately chooses the reference signals leaving the reference signal generator 204 and applies a reference signal chosen from phase comparator 203.

The frequency divider 201 has two frequency division ratios corresponding to the two reference signals of the reference signal generator 204.

Thus, the frequency of the signal leaving the OCT 162 is divided alternately by these ratios. These output signals whose frequency has thus been divided are chosen by the first switch 202 and applied to the phase comparator 203. The phase difference signals leaving the phase comparator 203 are applied to the gates 206 and 209. One of the gates 206 and 209 is set to the on state and the other is set to the non-on state for a period of 1 hour in two. The output of gate 206 is applied to a low-pass filter 207, while the output of gate 209 is applied to a low-pass filter 210. The low-pass filters 207 and 210 filter the phase difference signals from doors 206 and 209 so that the first and second control signals CSî are obtained and
CS2.

 The first and second control signals CSî and CS2 leaving the low-pass filters 207 and 210 are applied to the control signal terminals of the OCT 162. Thus, when the first and second control signals CSî and CS2 are switched, the free frequencies fOB and fOR are alternately established in OCT 162.

Furthermore, the automatic control circuit 20 has a synchronization controller 212 which controls the selection state of the switches 205 and 202, as well as the on / off state of the doors 206 and 209. Consequently, the OCT 162 is incorporated in the two BVP circuits comprising respectively the low-pass filters 207 and 210.

 Assuming now that the composite signal carrying the "B-Y" signal is applied, the OCT 162 is incorporated into the BVP circuit comprising the gate 206 and the low pass filter 207 to stabilize the first control signal CS1. Then, the free frequency fOB is established in response to the first control signal CS1. When the other composite signal carrying the "R-Y" signal is applied, the OCT 162 is incorporated into the BVP circuit composed of the gate 209 and the low-low filter 210 to establish the second control signal CS2. The free frequency fOR is then established in response to the second control signal CS2.

We now explain the BVP circuit allowing the first control signal to be stabilized
CS1. The output signal of the OCT 162 is first applied to the frequency divider 201. If it is assumed that the frequency division ratio is at this moment 1/17, the free frequency around fOB (- 272fH ) oscillated in the OCT 162 is divided to obtain a frequency close to 16fH.

 Assuming now that a 16fH signal leaves the reference signal generator 204, the phases of the two signals are compared in the phase comparator 203 and, in the event of phase shift, a beat signal occurs. At this time, the door 206 is active but the door 209 is non-passing. The door 206 allows the output signal from the phase comparator 203 to pass to the low-pass filter 207.

Thus, the frequency of the oscillations of the OCT 162 is adjusted to the free frequency fOB by the control signal CSî coming from the low-pass filter 207. The frequency of the oscillations of the OCT 162, that is to say the free frequency fOB is controlled so that the divided output signal of the OCT 162 is equal to the reference signal from the reference signal generator 204 in the phase comparator 203. At this time, the free frequency fOB of 272fH is completely stabilized.

We now explain the other BVP circuit allowing the second control signal to be stabilized.
CS2. Assuming that the frequency division ratio at this time is 1/141, the free frequency around fOR (282fH) oscillated in the OCT 162 is divided to obtain a frequency close to 2fH.

 Assuming now that a signal of 2fH leaves the reference signal generator 204, the phases of the two signals are compared in the phase comparator 203 and, in the event of phase shift, a beat signal occurs. At this time, the door 209 is active, but the door 206 is non-passing. The gate 209 allows the output signal from the phase comparator 203 to pass to the low-pass filter 210.

The frequency of the oscillations of the OCT 162 is thus adjusted to the free frequency fOR by the control signal CS2 coming from the low-pass filter 210. The frequency of the oscillations of the OCT 162, that is to say the frequency free fOR is controlled so that the divided output signal from OCT 162 is equal to the reference signal from the reference signal generator 204 in the phase comparator 203. At this time, the free frequency becomes completely stabilized at fOR or 282fH.

 In the embodiment described above, if the frequency divider 201 does not operate erroneously, the frequency division ratio will surely be the above value and, therefore, the accuracy of the free frequencies fOB and fOR depends on the absolute frequency accuracy of the reference signal.

 It may be possible to obtain a high precision signal from another block of the television set but, if this is difficult, it is necessary to make a high precision signal available.

 There is shown in FIG. 6. an example of the reference signal generator 204. As can be seen in FIG. 6, the reference signal generator 204 comprises a quartz oscillator 221 having a 4MHz quartz resonator (- 256fH) and a selectable frequency divider 222 having two division ratios 1/128 and 1/16. The frequency of the 4MHz oscillations of the crystal oscillator 221 is selectively divided in the ratio 1/128 or 1/16 in the frequency divider 222. The reference signals of 2fH and 16fH can thus be obtained from the frequency divider 222. The frequency divider 222 can be achieved by seven stages of 1/2 frequency dividers which are connected in series. The 16fH reference signal is output using four stages of 1/2 frequency dividers. The frequency division ratios of the frequency divider 222 are established precisely, and therefore the accuracy of the reference signal depends on the accuracy. the frequency of oscillations of the crystal oscillator 221. In general, the precision of the crystal oscillator 221 is less than 20Oppm, and of the order of 10-4, which is sufficient for the precision of the frequency free from OCT 162.

 The frequency division ratios indicated above do not limit the subject of the present invention and any frequency is acceptable if it is possible to form the BVP circuit making it possible to stabilize the free frequencies of the OCT 162. For example, when the fOB and the fOR are stabilized, an oscillator can be used to obtain the frequency fH of the oscillations as a reference signal.

 During a period of stabilization of the free frequency fO of the OCT 162, it is necessary to choose a period where the demodulation of the color difference signal is not affected.

 There is shown in FIG. 7, a time diagram when the above-mentioned stabilization of the free frequencies was carried out in the vertical spot return period. As described above, the output signal of the frequency divider 201 has a low frequency so that it cannot be compared only in the horizontal blanking period, while a comparison time is available in the cycle d 'picture. However, since there are two frequencies, namely fOB and fOR, to be stabilized, a method is used to stabilize them by switching the BVP circuits alternately for every other image.

 A vertical synchronization signal exists for 3H in each image. Using this signal as a trigger, a trigger pulse K1 is applied to gates 206 and 209. This trigger pulse K1 is produced by the synchronization controller 212, and its state is changed at intervals of one image for a period of 16H from the leading edge of the synchronization signal.

The trigger pulse for gate 206 becomes the low level Lo of the "n-l" th image and the "n + 1" th image, and puts gate 206 in the active state during this period.

 The trigger pulse for gate 209 becomes low level Lo in the "n" th image and the "n + 2" th image2 and puts gate 209 in the active state during this period. In addition, a trigger pulse K2 is used as an input signal switching pulse to the phase comparator 203. The trigger pulse K2 is a pulse whose state changes in synchronism with the leading edge of the vertical synchronization signal and becomes the high level Hi in the "nl" th image and the "n + 2nd image. When the trigger pulse K2 is at the high level, the BVP stabilization circuit of fOB is chosen and switches the switches 205 and 202 towards the side of the specified terminals.

 As described above, the processing of the color difference signals is carried out practically without stabilization by the demodulation system of the color difference signal and the automatic control circuit which establishes a free frequency of the OCT in the BVP circuit.

We now explain a stabilization of the ID signal. In order to stabilize the standard frequency fOID (- 277fH) of the ID 17 signal demodulator, it is only necessary to split the output signal by
OCT, not shown, in the ID signal demodulator 17 and incorporating it into the BVP circuit which has another stabilized reference signal similar to the color difference signal demodulator 16.

For example, it is sufficient to divide 277fH by 277, to transform the signal obtained into a signal around fH, to compare its phase with the reference signal fH and to lock in phase the OCT. Thus, in the same way as in the color difference signal demodulator 16, the OCT of the ID signal demodulator 17 is capable of obtaining fOID (see fig. 4) which is exactly 277 times fH. In addition, the division stage of 1/277 can be used in common with the previous frequency divider 201, or a BVP circuit can be provided independently for ID.

As described above, when establishing the free frequency of OCT in the
BVP using a circuit system demodulator
BVP, it is possible to stabilize the demodulators by making it possible to incorporate the OCT in the BVP circuit by using another reference signal. In addition, it is also possible to switch the demodulation axis by division in time by switching the free frequency and to reduce a demodulator to demodulate the color difference signals of the SECAM system. In addition, in integrated devices, the demodulation system can be integrated on a single "chip", even if the number of devices increases, and manual adjustment points are further eliminated. This is advantageous both from the point of view of the manufacturing process and of the short.

 As described above, the present invention can create an extremely good chrominance signal processing apparatus.

 The invention is not limited to the embodiments, shown and described in detail, because various modifications can be made without departing from its scope. It is also possible to make numerous modifications to adapt a particular situation or subject to the teaching provided by the present invention without departing from its scope.

Claims (7)

 1. Apparatus for demodulating signals which are FM modulated with a set of different frequencies on a time division carrier signal, comprising  an input means for receiving the carrier signal carrying the signals; and  - FM demodulation means to demodulate FM signals from the input means,  characterized in that the demodulation means FM has a set of demodulation axes corresponding to the set of different frequencies.  2. Apparatus according to claim 1, characterized in that it further comprises means for manually controlling all of the demodulation axes.  3. Apparatus according to claim 1, characterized in that it further comprises means for automatically controlling all of the demodulation axes.  4. Apparatus according to one of claims 1 to 3, characterized in that the FM demodulation means comprises a phase locked loop incorporating a voltage controlled oscillator.  5. Apparatus according to one of claims 1 to 4, characterized in that the automatic control means comprises a set of phase locked loops in which the voltage controlled oscillator is selectively incorporated.  6. Apparatus according to one of claims 1 to 5, characterized in that the automatic control means further comprises a reference signal generator associated with the phase locked loops.  7. Apparatus according to one of claims 1 to 6, characterized in that the automatic control means further comprises a selectable frequency divider having several division ratios corresponding to all of the phase locked loops.