FR2638867A1 - Method and circuit for reinitialising the operation of a circuit - Google Patents

Abstract

The invention relates to circuits controlled by a microprocessor. The operation of these circuits may sometimes be interrupted by interrupt signals such as an interrupt by an external reset signal RSe, a reset signal in the event of a drop in the power supply voltage RSa, or various other signals RSd. A power supply monitoring circuit 14 supplies a signal triggering a reset program executed by the microprocessor UC; on the other hand, it writes a flag bit into a flag bit register DR. When the reset program runs, this register is tested and a conditional jump instruction makes it possible to avoid a certain number of reset steps when the cause which has triggered the reset is other than insufficient power supply.

Description

RESET METHOD AND CIRCUIT
OF THE OPERATION OF A CIRCUIT
The invention relates to microprocessor circuits and more generally circuits operating under the control of sets of instructions.

 The control programs for such circuits, generally stored in read only memory (ROM), include reset sequences to restart the operation of the circuit in the event of a fault or interruption, voluntary or not.

 Faults and interruptions can come from different sources linked to the internal functioning of the circuit or to the environment. For example, an abnormal drop in the supply voltage is a fault; pressing a restore button is a voluntary interruption.

 Depending on the nature of the fault or interruption, one instruction program or another will be implemented in order to restart the operation of the circuit.

Still by way of example, it is conceivable that if the interruption is a voluntary interruption by pressing a restore button, a first instruction program will be applied to the microprocessor to reset the operation, whereas if the interruption comes upon detection of a supply fault, a second program will be launched.

 Under the name first or second program, it will be understood that qzeil can also be the same program of which certain parts (subprograms) run differently in the two cases.

 Microprocessor circuits therefore generally comprise a circuit known as a “restoration circuit”, the function of which is to receive electrical interruption signals and to supply other electrical signals ensuring the initiation of reset programs.

 In the known technique for relatively simple microprocessor circuits such as those which are used to control consumer devices (radios, video recorders, washing machines, etc.) the solution adopted for resetting in the event of a power failure is as follows : the restoration circuit receives signals from a supply fault detector and from various sources of interruption. When it receives any interrupt signal, either from the power failure detector or from another source, it provides a reset command. This order initializes for example a program counter at a position corresponding to the first instruction of a general reset program contained in a read-only memory. The general program runs and contains at a moment a test sequence of a stored flag bit in a specified register physically present in the circuit.

 However, a flag bit was entered in this register by a comparator connected to a witness register. the witness register includes a large number of boxes, for example 80 binary boxes (10 bytes) which are in principle all in the same state. The comparator examines the state of the 80 bits and, if it finds at least one which is different from the others, it forces the flag bit into a specified state. The reason is as follows: we consider that if one bit (or more) on the 80 is no longer in the same state as the others, then we did nothing voluntarily to change it, c 'was that there was a feeding problem.

If, on the contrary, the bits have all remained identical, it means that there has been no feeding problem.

 The reset program therefore comes to test the state of the flag bit register bit, which is the result of examining the witness register. Depending on the state of the flag bit, a connection or another is made in the reset program. For example, if there has been a power supply problem, the content of certain dynamic memories (RAM) is reinitialized because this content is no longer reliable; data contained in the read-only memory or calculated by program are reintroduced into the dynamic memory. Otherwise, if the interruption comes from another source, the reinitialization program is carried out without going through the reintroduction sequence in dynamic memory of data saved in read-only memory. The data present being considered as coming from valid calculations.

 To simplify the constitution of the reset circuits (in particular by deleting the 80-bit witness register) and to make the reset of all that needs to be reset more secure, the present invention proposes to control the recording of the flag bit by the output of the supply fault detector (the one used to supply a reset program trigger signal), to force a certain state in the flag bit register as soon as the detector detects a fault requiring a reset.

 In other words, we do not modify the reset program with its connections and the test sequence of the flag bit, but instead that the content of the flag register is the result of the examination of the possible upheavals of the bits of a witness register of 80 bits, this content is forced by the power supply fault detector itself. The fault which gives rise to a reset remains memorized in the flag bit register even after disappearance of the output signal of the detector which triggered a reset procedure.

More specifically, the invention proposes a method for resetting a circuit controlled by series of instructions, this method comprising the steps consisting in:
- receive an interrupt signal which comes either from an output of a supply fault detector, or from another source of interruption,
- have the supply fault detector write a bit in a flag register when the supply fault detector sends an interrupt signal,
- have a restoration program trigger a restoration program upon reception by the restoration circuit of an interrupt signal whatever its origin,
- test during the program the state of the flag bit,
- make a program connection according to the test result.

 Expressed in the form of circuitry, the invention provides an electrical circuit comprising a main circuit controlled by instructions, a circuit for detecting supply faults, a restoration circuit receiving as inputs on the one hand the output of the detection circuit and d on the other hand, other input signals capable of triggering a program for restoring the operation of the main circuit, the restoration circuit being capable of triggering the execution of a restoration program executable by the main circuit, the restoration program comprising on the one hand a step of verifying the state of a flag bit and on the other hand sequences of different instructions according to the state of this bit, characterized in that the flag bit is stored in a linked register at the output of the supply fault detection circuit, this bit representing information that the restoration is due to a power cut tation.

 Other characteristics and advantages of the invention will appear on reading the detailed description which follows and which is made with reference to the appended drawing in which the single figure represents a block diagram making it possible to better understand the invention.

 There is shown symbolically in the figure a circuit 10 controlled by a microprocessor whose central unit is designated by the reference UC.

 The microprocessor is itself controlled by an instruction program stored for example in a read only memory (ROM).

 The central processing unit operates in close cooperation with the read-only memory or program memory, with at least one random access memory (RAN) or dynamic memory, and finally with other circuit elements, in particular input-output peripherals. All these elements which cooperate with the central unit are interconnected with each other by a bus B of several conductors supplying and receiving signals according to a well-defined protocol.

 The program memory contains a program for restoring the operation of the circuit, this program being designed to restart the circuit 10 after an incident.

 This program is started automatically after an incident thanks to a restoration circuit 12 which is coupled to the central processing unit UC.

For example, the restoration circuit 12 provides a signal which resets to zero (or to another well-determined value) an instruction counter of the central unit. This counter is used for addressing the program memory and the address corresponding to the content of the counter (reset to zero or reset to a known starting value) is pointed; At this address, the first instruction of a program for restoring the operation of circuit 10 is written in the program memory.

 There are several types of incidents which can generate, through the restoration circuit 12, a reset signal for the central unit program counter.

 In the example shown, an OR gate with several inputs receives different signals, each taken individually must be able to trigger the transmission by the restoration circuit 12 of a reset signal.

 One of the OR gate input signals comes from a circuit 10 restoration terminal; this signal is designated by Rse in the figure. The signal RSe is a voluntary interruption of operation signal, coming from outside the circuit 10.

 Another input signal capable of causing restoration is designated by the reference RSa; it comes from a supply monitoring circuit 14 forming part of the circuit 10; this signal RSa causes restoration in the case where the monitoring circuit detects that the supply voltage Vdd of circuit 10 is below a minimum admissible value for correct operation of the circuit.

 Finally, other signals liable to cause restoration are generally designated by the reference RSd; they come from inside or outside the circuit 10 and correspond either to voluntary interruptions or to detections of various abnormal operations of the circuit.

The series of instructions contained in read-only memory and corresponding to a program for restoring the operation of the circuit 10 comprises a first part which corresponds to reset steps common to all the cases of interruption envisaged; in other words, the first part of the restoration program is the same, whether the interruption comes from the signal RSe (restoration from the inside), from the signal RSa (detection by circuit 14 of an insufficient supply), or of the Rsd signal (others). This part corresponds for example to the execution of instructions such as
- reset certain registers to zero,
- resetting of certain counters,
- tests of the condition of certain bus conductors,
- etc.

 When this part of the program has been executed, we arrive at an instruction to test the content of a special one-bit register, designated by the reference DR in the figure. This register contains a flag bit, that is to say a bit indicating a particular state that the program must take into account before continuing.

 The flag bit register is set to logic state zero (for example) during normal operation of the circuit. The end of the program for restoring the operation of circuit 10 moreover includes for this purpose an instruction to reset the content of the flag bit register DR. However, the content of the flag bit register DR is set to logic state 1 by the supply monitoring circuit 14 as soon as the latter detects a voltage drop too great for the circuit 10 to continue to operate reliably.

 During the course of the restoration program, we therefore arrive at a step of testing the flag bit of the register DR. If it is zero, it means that the restoration in progress is due to something other than an insufficient supply voltage, and some steps of the restoration program are bypassed; these stages are short-circuited by means of a conditional branching instruction provided for in the program, the condition being the content of the flag bit register.

 If, on the contrary, the flag bit is in logic state 1, this means that the restoration in progress was necessitated by an insufficient supply, and it is then necessary to carry out a more complete restoration program. The conditional branching instruction then directs the program to the execution of a part of the program omitted in the previous case.

 For example, the part of the additional restoration program, which must be executed in the event of the restoration following an insufficient supply voltage, includes instructions for writing to the data working memory (RAM), coefficients, constants, etc. which are initially contained in read-only memory (ROT) or from previous calculations corresponding to the context preceding the power supply fault, but which the microprocessor needs to have in RAM to operate. It is considered that the drop in supply voltage has entailed a risk of losing this data in the RAM (or it had been installed during the previous boot). They must be reinstalled there, and this is the purpose of the additional program steps. On the contrary, this reinstallation is not carried out when the restoration was due to another cause because then we know that the data is always present in RUM memory.

 After the execution of the additional instructions due to state 1 of the flag bit of the DR register, the restoration program resumes a common sequence independent of the initial cause which triggered the restoration. This common program includes in particular the resetting of the flag bit register DR.

Claims (2)

 1. Method for resetting a circuit controlled by series of instructions, this method comprising the steps of  - receive an interruption signal (Rsa, Rsd, -Rse) which comes either from an output of a supply fault detector (14), or from another source of interruption,  - have the feed fault detector write a bit in a flag register (DR) when the feed fault detector sends an interrupt signal,  - cause a restoration circuit (12) to trigger a restoration program upon reception by the restoration circuit of an interrupt signal whatever its origin,  - test during the program the state of the flag bit,  - make a program connection according to the test result.  2. Electrical circuit comprising a main circuit (10) controlled by instructions, a supply fault detection circuit (14), a restoration circuit (12) receiving as inputs on the one hand the output of the detection circuit and d on the other hand, other input signals capable of triggering a program for restoring the operation of the main circuit, the restoration circuit being capable of triggering the execution of a restoration program executable by the main circuit, the restoration program comprising on the one hand a step of verifying the state of a flag bit and on the other hand different instruction sequences according to the state of this bit, characterized in that the flag bit is stored in a register ( DR) connected to the output of the supply fault detection circuit, this bit representing information that the restoration is due to a power cut.