FR2584533A1 - High-frequency transistor casing - Google Patents

High-frequency transistor casing Download PDF

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Publication number
FR2584533A1
FR2584533A1 FR8609752A FR8609752A FR2584533A1 FR 2584533 A1 FR2584533 A1 FR 2584533A1 FR 8609752 A FR8609752 A FR 8609752A FR 8609752 A FR8609752 A FR 8609752A FR 2584533 A1 FR2584533 A1 FR 2584533A1
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Prior art keywords
housing
base
transistor
insert
high frequency
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FR8609752A
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French (fr)
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Thomas Robert Aple
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Acrian Inc
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Acrian Inc
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Publication of FR2584533A1 publication Critical patent/FR2584533A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6644—Packaging aspects of high-frequency amplifiers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01058—Cerium [Ce]
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    • H01L2924/01079—Gold [Au]
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    • H01L2924/013—Alloys
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
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    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H01L2924/30111—Impedance matching

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microwave Amplifiers (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The invention relates to a casing for a microwave frequency transistor. It comprises a body in the base of which is mounted an insert 14 intended to conduct the heat from the transistors, which are to be housed in the casing, to the outer face of the latter. Impedance-balancing zones are provided between input and output couplings 10, 12 and transistors mounted in the casing. Field of application: microwave frequency circuits.

Description

La présente invention concerne d'une manière générale le domaine des transistors à haute fréquence, et plus particulièrement un boîtier pour le montage d'un transistor à haute fréquence pour des utilisations modlulaires.  The present invention relates generally to the field of high frequency transistors, and more particularly to a housing for mounting a high frequency transistor for modular uses.

. .

Il est devenu de plus en plus difficile de trouver et de retenir des techniciens spécialisés dans les très hautes fréquences, par exemple les hyperfréquences ou analogues. Par conséquent, la présence de dispositifs de types modulaires, permettant une conception à un niveau d'intégration ou de fonctionnalité plus élevé est très souhaitable. L'un des problèmes les plus ennuyeux rencontrés par le spécialiste des radiofréquences est qu'il a à faire aux très bas niveaux d'impédance non linéaires de transistors à haute puissance. Le milieu de transmission du matériel des circuits à radiofréquence est habituellement au niveau de 50 ohms ; par conséquent, l'impédance des transistors, de l'ordre de 1 ohm, doit être portée au niveau de 50 ohms. It has become increasingly difficult to find and retain technicians specializing in very high frequencies, for example microwave or the like. Therefore, the presence of modular types of devices, allowing design at a higher level of integration or functionality is very desirable. One of the most annoying problems encountered by the radiofrequency specialist is that it has to do with the very low nonlinear impedance levels of high power transistors. The transmission medium for radio frequency circuit equipment is usually at 50 ohms; therefore, the impedance of the transistors, of the order of 1 ohm, must be brought to the level of 50 ohms.

L'invention a donc pour objet de proposer un dispositif modulaire pour haute fréquence pouvant transformer le niveau d'entrée de I ohm d'un transistor à haute fréquence, grande puissance, au niveau de 50 ohms. The object of the invention is therefore to propose a modular device for high frequency capable of transforming the input level of I ohm of a high frequency, high power transistor, at the level of 50 ohms.

Un autre objectif de l'invention est de proposer un boîtier modulaire de transistor à haute fréquence, grande puissance, pouvant être directement utilisé dans un circuit à 50 ohms. Another objective of the invention is to propose a modular high-frequency, high-power transistor housing that can be directly used in a 50 ohm circuit.

Une autre difficulté rencontrée par les spécialistes des transistors à haute fréquence et grande puissance est la dissipation de la chaleur qu'ils dégagent et qui est propre à leur fonctionnement. Another difficulty encountered by specialists in high frequency and high power transistors is the dissipation of the heat which they give off and which is specific to their operation.

L'invention a donc pour objet de proposer un boîtier modulaire de transistor à haute fréquence prévu pour le montage d'une puce de transistor sur un radiateur thermique hautement efficace incorporé dans le boîtier. The object of the invention is therefore to propose a modular high-frequency transistor housing intended for mounting a transistor chip on a highly efficient thermal radiator incorporated in the housing.

Un autre objet de l'invention est de proposer un boîtier modulaire de transistor à haute fréquence permettant le montage de transistors bipolaires ou du type à effet de champ. Another object of the invention is to propose a modular high-frequency transistor housing allowing the mounting of bipolar or field-effect type transistors.

Ces objets et d'autres objets de l'invention sont réalisés par un boîtier de transistor pour hyperfréquences dont les cotés et la base sont essentiellement en acier inoxydable ; le boîtier comporte, en son centre, un insert hautement conducteur de la chaleur s'étendant de la surface intérieure du fond du boîtier jusqu'à l'extérieur du boîtier. These and other objects of the invention are achieved by a microwave transistor housing whose sides and base are essentially of stainless steel; the housing has, in its center, a highly heat conducting insert extending from the interior surface of the bottom of the housing to the exterior of the housing.

Dans une forme préférée de réalisation, l'insert est essentiellement de forme en T , la tête du T affleurant le côté extérieur du boîtier. Le transistor est monté directement au-dessus de ou sur cet insert; la source d'un transistor à effet de champ peut être connectée directement à l'insert. Dans une autre forme de réalisation, en utilisant une pièce de matière isolante telle qu'un oxyde de béryllium, on peut monter directement au-dessus de l'insert un transistor bipolaire.  In a preferred embodiment, the insert is essentially T-shaped, the head of the T flush with the outside of the housing. The transistor is mounted directly above or on this insert; the source of a field effect transistor can be connected directly to the insert. In another embodiment, using a piece of insulating material such as beryllium oxide, a bipolar transistor can be mounted directly above the insert.

Dans tous les cas, la chaleur dégagée par le transistor à haute fréquence et grande puissance est efficacement conduite vers l'extérieur du boîtier.In all cases, the heat given off by the high frequency and high power transistor is efficiently conducted to the outside of the housing.

Selon un autre perfectionnement important de l'invention, un module efficace de transistor â haute fréquence, grande puissance, est obtenu par l'utilisation de réseaux éuilihrés d'entrée et de sortie comprenant les transformateurs nécessaires pour abaisser les 50 ohms d'entrée et de sortie aux impédances d'entrée très basses souhaitées (0,5 à 1 ohm) du transistor en fonctionnement. De cette manière, on obtient un module efficace de transistor à haute fréquence, grande puis sance, qui peut être connecté directement à un bus ou à une bande au niveau de 50 ohms, sans demander à l'utilisateur du module de concevoir une adaptation d'impédance ou un transformateur supplémentaire. According to another important improvement of the invention, an efficient high-frequency, high-power transistor module is obtained by the use of input and output networks comprising the transformers necessary to lower the 50 ohms input and output at the very low input impedances desired (0.5 to 1 ohm) of the transistor in operation. In this way, we obtain an efficient high frequency transistor module, large then sance, which can be connected directly to a bus or to a band at 50 ohms level, without asking the user of the module to design an adaptation of 'impedance or an additional transformer.

L'invention sera décrite plus en détail en regard des dessins annexés à titre d'exemple nullement limitatif et sur lesquels
les figures 1A et 1B sont des vues en perspective d'un boîtier de transistor et d'un insert conformes à l'invention ;
la figure 2 est une vue en plan de dessus d'une forme de réalisation de la présente invention, conçue pour le montage de transistors à effet de champ à source commune
la figure 3 est une vue en plan de dessus d'un boîtier conçu pour le montage de deux transistors bipolaires ou de deux transistors classiques à effet de champ par l'addition de deux bandes d'isolateurs à l'oxyde de béryllium
la figure 4 est une vue en plan montrant les réseaux d'équilibrage d'entrée et de sortie, ainsi que des transistors et d'autres composants incorporés dans un boîtier modulaire typique, conçu conformément à l'invention ; et
la figure 5 est un schéma du circuit équivalant aux réseaux d'équilibrage de la figure 4.The invention will be described in more detail with reference to the accompanying drawings by way of non-limiting example and in which
Figures 1A and 1B are perspective views of a transistor housing and an insert according to the invention;
Figure 2 is a top plan view of an embodiment of the present invention, designed for mounting common source field effect transistors
Figure 3 is a top plan view of a housing designed for mounting two bipolar transistors or two conventional field effect transistors by the addition of two strips of beryllium oxide insulators
Figure 4 is a plan view showing the input and output balancing networks, as well as transistors and other components incorporated in a typical modular package, designed in accordance with the invention; and
FIG. 5 is a diagram of the circuit equivalent to the balancing networks of FIG. 4.

Le boîtier proprement dit comprend des parois latérales et des parois extrêmes orientées vers le haut, avec une entrée radiofréquence 10 à une première paroi latérale et une sortie radiofréquence 12 à une autre paroi latérale. Le boîtier est avantageusement en acier inoxydable ; un insert 14 conducteur de la chaleur, sur lequel les transistors doivent être montés, est avantageusement un insert en cuivre plaqué d'or, de forme en T, brasé dans le boîtier en acier inoxydable.  The actual housing includes side walls and upwardly facing end walls, with a radio frequency input 10 to a first side wall and a radio frequency outlet 12 to another side wall. The housing is advantageously made of stainless steel; a heat conductive insert 14, on which the transistors must be mounted, is advantageously a gold-plated copper insert, T-shaped, brazed in the stainless steel case.

L'insert 14 proprement dit est montré globalement sur la figure 1B et il présente une forme générale en T, possédant une tête 16 dont le dessus est essentiellement à fleur du fond du boîtier, et une partie montante 18 qui s'étend de façon que sa surface supérieure affleure le dessus du substrat du circuit d'équilibrage pour qu'un contact puisse être aisément réalisé avec le transistor à monter.The insert 14 proper is generally shown in FIG. 1B and it has a general T shape, having a head 16 the top of which is essentially flush with the bottom of the housing, and a rising part 18 which extends so that its upper surface is flush with the top of the substrate of the balancing circuit so that contact can be easily made with the transistor to be mounted.

Un exemple de montage typique de transistor est montré sur la figure 2 où l'insert 14 apparaît au centre du boîtier, à l'emplacement où un transistor peut être monté. Dans cet exemple, le contact de source situé sur le dessous d'une puce de transistor à effet de champ à source commune (non représentée) est fixé par matriçage directement à l'insert. Les réseaux d'équilibrage d'entrée et de sortie (représentés en particulier sur la figure 4) sont définis dans des zones 20 et 22 du boîtier. An example of a typical transistor assembly is shown in Figure 2 where the insert 14 appears in the center of the housing, where a transistor can be mounted. In this example, the source contact located on the underside of a common source field effect transistor chip (not shown) is fixed by matrixing directly to the insert. The input and output balancing networks (shown in particular in FIG. 4) are defined in zones 20 and 22 of the housing.

En variante, comme montré sur la figure 3, des transistors bipolaires ou des transistors classiques à effet de champ peuvent également être montés dans ce boîtier. Le même type d'insert 14 conducteur de la chaleur est utilisé, ainsi que les mêmes zones 20, 22 de réseaux d'équilibrage. Cependant, il est prévu un îlot 24 d'oxyde de béryllium partiellement métallisé sur lequel le collecteur du transistor peut être fixé afin d'éviter un schéma de montage à collecteur commun. Alternatively, as shown in Figure 3, bipolar transistors or conventional field effect transistors can also be mounted in this housing. The same type of insert 14 conducting the heat is used, as well as the same zones 20, 22 of balancing networks. However, an island 24 of partially metallized beryllium oxide is provided on which the collector of the transistor can be fixed in order to avoid a common collector mounting scheme.

La puce du transistor peut autre montée sur la zone métallisée 26 formant le contact du collecteur. Des contacts de base et d'émetteur sont situés sur le dessus de la puce. The transistor chip can also be mounted on the metallized zone 26 forming the contact of the collector. Base and transmitter contacts are located on the top of the chip.

Les connexions entre le transistor et le circuit sont les mimes que celles des transistors montés dans un boîtier classique. Deux zones de montage de transistor sont représentées sur la figure 3, car, en général, deux dispositifs sont montés dans un boîtier. The connections between the transistor and the circuit are the same as those of the transistors mounted in a conventional box. Two transistor mounting areas are shown in Figure 3 because, in general, two devices are mounted in a housing.

Une comparaison des figures 4 et 5 permet de comprendre la conception des réseaux d'équilibrage d'entrée et de sortie. Sur le coté d'entrée, des éléments 32 et 34 constituent des transformateurs quart-d'onde qui sont globalement désignés par les mêmes références numériques sur les figures 4 et 5. La référence 36 désigne un petit condensateur de blocage. Les fils de connexion de la grille d'entrée du transistor 40 sont représentés par l'inductance 42 et le condensateur d'équilibrage en sortie du second transformateur 34 est désigné de façon commune par la référence numérique 46. Comme mentionné précédemment, la source du transistor 40 est directement fixée par matriçage au radiateur thermique. A comparison of FIGS. 4 and 5 makes it possible to understand the design of the input and output balancing networks. On the input side, elements 32 and 34 constitute quarter-wave transformers which are generally designated by the same reference numerals in FIGS. 4 and 5. The reference 36 designates a small blocking capacitor. The connection wires of the input gate of the transistor 40 are represented by the inductor 42 and the balancing capacitor at the output of the second transformer 34 is commonly designated by the reference numeral 46. As mentioned previously, the source of the transistor 40 is directly fixed by matrixing to the thermal radiator.

Le drain de sortie du transistor 40 est connecté à un condensateur 48 d'équilibrage par l'intermédiaire d'un condensateur 50 de distribution et de transformateurs quart-d'onde 52, 54, 56 et d'un condensateur 60 de blocage à la sortie 50 ohms. De cette manière, on obtient un boîtier modulaire capable d'abaisser une impédance d'entrée de 50 ohms à une impédance d'entrée d'un ohm utilisable pour un transistor, puis de remonter l'impédance de sortie au niveau de 50 ohms. The output drain of transistor 40 is connected to a balancing capacitor 48 via a distribution capacitor 50 and quarter-wave transformers 52, 54, 56 and a capacitor 60 for blocking the 50 ohm output. In this way, a modular box is obtained capable of lowering an input impedance of 50 ohms to an input impedance of one ohm usable for a transistor, then of raising the output impedance to the level of 50 ohms.

il va de soi que de nombreuses modifications peuvent être apportées au boîtier décrit et représenté sans sortir du cadre de l'invention.  It goes without saying that many modifications can be made to the box described and shown without departing from the scope of the invention.

Claims (5)

REVENDICATIONS 1. Boîtier pour dispositif à transistor à haute fréquence, caractérisé en ce qu'il comprend un corps possédant une base et des parois latérales qui s'en élèvent, un flot (24) situé dans la base et comprenant un insert (14) posé dans le corps, monté près du coté extérieur du corps et pénétrant dans ce dernier afin de conduire la chaleur des transistors vers l'extérieur du corps. 1. Housing for high frequency transistor device, characterized in that it comprises a body having a base and side walls which rise therefrom, a flow (24) located in the base and comprising an insert (14) placed in the body, mounted near the outer side of the body and penetrating into the latter in order to conduct the heat of the transistors to the outside of the body. 2. Boîtier pour haute fréquence selon la revendication 1, caractérisé en ce que l'insert s'étend à travers la base jusqu'à la face extérieure du corps. 2. Housing for high frequency according to claim 1, characterized in that the insert extends through the base to the outer face of the body. 3. Boîtier pour haute fréquence selon la revendication 2, caractérisé en ce qu'il comporte au moins une couche de BeO sur la base de la tige afin de l'isoler d'un transistor fixé. 3. Housing for high frequency according to claim 2, characterized in that it comprises at least one layer of BeO on the base of the rod in order to isolate it from a fixed transistor. 4. Boîtier pour haute fréquence selon la revendication 1, caractérisé en ce qu'il comporte en outre des couplages d'entrée et de sortie (10, 12) situés dans les parois latérales du boîtier, et des réseaux (20, 22) d'équilibrage à couches minces s'étendant sur la base du corps entre la zone de montage du transistor et les couplages d'entrée et de sortie. 4. Housing for high frequency according to claim 1, characterized in that it further comprises input and output couplings (10, 12) located in the side walls of the housing, and networks (20, 22) d 'thin film balancing extending over the base of the body between the transistor mounting area and the input and output couplings. 5. Boîtier pour dispositif à transistor à haute fréquence, caractérisé en ce qu'il comporte un corps comprenant une base et des parois latérales qui s'en élèvent, un îlot (24) situé au centre de la base et comprenant un insert (14) en cuivre de forme en T, brasé dans le centre du corps, cet insert comportant une tête élargie (16) montée à proximité de la face extérieure du corps et une tige (18) pénétrant dans le corps pour conduire la chaleur des transistors vers l'extérieur du corps.  5. Housing for high frequency transistor device, characterized in that it comprises a body comprising a base and side walls which rise therefrom, an island (24) located in the center of the base and comprising an insert (14 ) made of T-shaped copper, brazed in the center of the body, this insert comprising an enlarged head (16) mounted near the external face of the body and a rod (18) penetrating into the body to conduct heat from the transistors outside the body.
FR8609752A 1985-07-05 1986-07-04 High-frequency transistor casing Pending FR2584533A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US75210085A 1985-07-05 1985-07-05

Publications (1)

Publication Number Publication Date
FR2584533A1 true FR2584533A1 (en) 1987-01-09

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ID=25024876

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8609752A Pending FR2584533A1 (en) 1985-07-05 1986-07-04 High-frequency transistor casing

Country Status (3)

Country Link
JP (1) JPS6276657A (en)
FR (1) FR2584533A1 (en)
NL (1) NL8601743A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0384301A2 (en) * 1989-02-17 1990-08-29 Nokia Mobile Phones Ltd. Cooling arrangement for a transistor
EP0599591A1 (en) * 1992-11-25 1994-06-01 STMicroelectronics, Inc. Emitter follower transistor with improved thermal resistance characteristics

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4172261A (en) * 1977-01-10 1979-10-23 Nippon Electric Co., Ltd. Semiconductor device having a highly air-tight package
EP0030168A1 (en) * 1979-11-21 1981-06-10 Thomson-Csf Device for parallel arrangement of very high frequency power transistors
JPS5676579A (en) * 1979-11-28 1981-06-24 Mitsubishi Electric Corp Longitudinal microwave transistor package
EP0110997A1 (en) * 1982-04-30 1984-06-20 Fujitsu Limited Semiconductor device package

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4172261A (en) * 1977-01-10 1979-10-23 Nippon Electric Co., Ltd. Semiconductor device having a highly air-tight package
EP0030168A1 (en) * 1979-11-21 1981-06-10 Thomson-Csf Device for parallel arrangement of very high frequency power transistors
JPS5676579A (en) * 1979-11-28 1981-06-24 Mitsubishi Electric Corp Longitudinal microwave transistor package
EP0110997A1 (en) * 1982-04-30 1984-06-20 Fujitsu Limited Semiconductor device package

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENTS ABSTRACTS OF JAPAN, vol. 5, no. 141 (E-73)[813], 5 septembre 1981; & JP-A-56 76 579 (MITSUBISHI DENKI K.K.) 24-06-1981 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0384301A2 (en) * 1989-02-17 1990-08-29 Nokia Mobile Phones Ltd. Cooling arrangement for a transistor
EP0384301A3 (en) * 1989-02-17 1993-01-07 Nokia Mobile Phones Ltd. Cooling arrangement for a transistor
US5214309A (en) * 1989-02-17 1993-05-25 Nokia Mobile Phones Ltd. Thermally conductive bar cooling arrangement for a transistor
EP0599591A1 (en) * 1992-11-25 1994-06-01 STMicroelectronics, Inc. Emitter follower transistor with improved thermal resistance characteristics

Also Published As

Publication number Publication date
JPS6276657A (en) 1987-04-08
NL8601743A (en) 1987-02-02

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