FR2581271B1 - Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres. - Google Patents

Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres.

Info

Publication number
FR2581271B1
FR2581271B1 FR8506574A FR8506574A FR2581271B1 FR 2581271 B1 FR2581271 B1 FR 2581271B1 FR 8506574 A FR8506574 A FR 8506574A FR 8506574 A FR8506574 A FR 8506574A FR 2581271 B1 FR2581271 B1 FR 2581271B1
Authority
FR
France
Prior art keywords
elementary circuits
interconnecting
prediffused circuit
free interconnections
interconnections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8506574A
Other languages
English (en)
Other versions
FR2581271A1 (fr
Inventor
Pierre Charransol
Jean-Claude Audrix
Jacques Gouit
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
ALE International SAS
Original Assignee
Thomson CSF Telephone SA
Le Materiel Telephonique Thomson CSF
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF Telephone SA, Le Materiel Telephonique Thomson CSF filed Critical Thomson CSF Telephone SA
Priority to FR8506574A priority Critical patent/FR2581271B1/fr
Publication of FR2581271A1 publication Critical patent/FR2581271A1/fr
Application granted granted Critical
Publication of FR2581271B1 publication Critical patent/FR2581271B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
FR8506574A 1985-04-30 1985-04-30 Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres. Expired FR2581271B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8506574A FR2581271B1 (fr) 1985-04-30 1985-04-30 Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8506574A FR2581271B1 (fr) 1985-04-30 1985-04-30 Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres.

Publications (2)

Publication Number Publication Date
FR2581271A1 FR2581271A1 (fr) 1986-10-31
FR2581271B1 true FR2581271B1 (fr) 1987-05-29

Family

ID=9318834

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8506574A Expired FR2581271B1 (fr) 1985-04-30 1985-04-30 Procede d'interconnexion de circuits elementaires sur un circuit prediffuse a interconnexions libres.

Country Status (1)

Country Link
FR (1) FR2581271B1 (fr)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2524206B1 (fr) * 1982-03-26 1985-12-13 Thomson Csf Mat Tel Circuit integre prediffuse, et procede d'interconnexion des cellules de ce circuit

Also Published As

Publication number Publication date
FR2581271A1 (fr) 1986-10-31

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Legal Events

Date Code Title Description
ST Notification of lapse