FR2571193A1 - MESSAGE TRANSMITTER AND RECEIVER COMPRISING SUCCESSIVE PULSES MODULATING A FIXED FREQUENCY CARRIER - Google Patents

Abstract

THE INVENTION CONCERNS TRANSMITTERS AND RECEIVERS OF MESSAGES CONSTITUTED OF SUCCESSIVE PULSES MODULATING A CARRIER AT FIXED FREQUENCY. IT CONSISTS OF MODIFYING THE INFORMATION MESSAGE PROPERLY CALLED OF THE MESSAGE BY PERFORMING A PHASE INVERSION MODULATION BETWEEN SUCCESSIVE PULSES. THE RECEIVER THEN INCLUDES MEANS 17, 19 FOR DETECTION OF PHASE JUMPS FOLLOWED BY A PROTECTION CIRCUIT 20 AGAINST PARASITES WHICH MAY INTERRUPT THE DETECTION OF PHASE JUMPS. THE MEANS TO DETECT PHASE JUMPS ARE ADVANTAGEALLY FORMED BY USING A QUADRIPHASE 17 DEMODULATOR CONNECTED TO A THRESHOLD DETECTOR 19. IT MAKES AN INCREASE IN THE EFFICIENCY AND SAFETY OF SYSTEMS USING MESSAGES CONSTITUTING OF FOLLOWING PULSES MODULATING A FIXED FREQUENCY CARRIER.

Description

2 5 7 1193

  TRANSMITTER AND RECEIVER OF MESSAGES CONSISTING OF PULSES

  SUCCESSIVE MODULATING A FIXED FREQUENCY CARRIER

  The present invention relates to emitters and message receivers consisting of successive pulses modulating a fixed frequency carrier. In general, these messages are composed of a preamble consisting of a set of successive pulses and a variable message.

  also consisting of successive impulses carrying the proper information

  so-called. The preamble allows the receiver to recognize the arrival of a message and initiate the processing of the information contained in the message.

message received.

  It has appeared necessary in certain particular embodiments, in particular in the transceivers of identification messages, to add information and thus to improve the coding without changing its essential characteristics so as, on the one hand, not to make modifications too much existing apparatus, and on the other hand, to conceal at best the coding change thus practiced to combat

against possible interference.

  To obtain this result, the invention proposes a transmitter of messages consisting of successive pulses modulating a fixed frequency carrier, these messages being composed of a preamble and a variable message bearing the coded information mainly characterized in that it comprises means for changing the phase of the carrier frequency between two consecutive pulses of the message as a function of

the information to be transmitted.

  Other features and advantages of the invention will appear

  clearly in the following description given by way of example no

  limiting and made with reference to the appended figures among which:

  FIG. 1, which represents the diagram of a transmitter according to the

  vention; - Figure 2, which shows the diagram of a first embodiment of a receiver according to the invention; - Figure 3, which shows the embodiment of the phase hopping detector 19 and the protection circuit 20 of Figure 2;

  FIG. 4, which represents a table of logical measurements determined by

  the criterion of recognition of phase jumps; - Figure 5 which shows the partial diagram of a receiver according to the invention according to a second embodiment.

  The following description relates to a transmitter and receiver of

  identification messages known by the acronym of Anglo-Saxon origin IFF

  for example to distinguish an enemy aircraft from a friendly aircraft.

  The messages emitted by this type of transmitter are an example of messages consisting of successive pulses modulating a carrier to

fixed frequency.

  The basic message, which is sent by the transmitter to the mobile equipped with an answering machine, consists in this case of a pulse train of 0.5 microseconds wide, a duration of about 70 microseconds . This message is also composed of a preamble which is then formed of

  four pulses whose front fronts are separated from two micro-

  seconds and a variable message comprising the other pulses and whose fronts are separated from each other by a duration of two, three, or four microseconds. The preamble makes it possible to recognize the arrival of an IFF message and to initiate the processing of the information

contained in the received message.

  The currently available oscillators, which can be used both in the transmitter of the interrogator and in the local oscillator of the answering machine carried by the mobile, have a sufficient stability for the intermediate frequency signal, obtained after reception and change of frequency. frequency in the responder, remains consistent for a period longer than the time between two pulses of the IFF message. Thus, the pulses constituting the message can be further modulated by performing a 180-degree phase jump of the carrier between two successive pulses of the message. In order to be able to detect the phase jumps, it is necessary to have, on the reception side, a phase reference which, in the longest interval separating two consecutive pulses, remains sufficiently well calibrated on the phase of the transmitted carrier to make it possible to distinguish unambiguously, whether or not there is a phase jump between these two pulses. In a classical way, the phase jump is recognized if the difference between two successive measurements is at least equal to "/ 2 and

plus 3.

  The transmitter of the interrogator shown in Figure 1 is provided with a very stable frequency generator 1, generating the carrier frequency f0. This generator 1 supplies a power amplifier 2 through a phase-shifter 3 which makes it possible to obtain a differential phase modulation. The amplifier 2 is connected to the transmitting antenna 4. A message generator 5 provides pulse transmission commands to a pulse modulator 6. This modulator transmits the IFF mode message 4 to the amplifier 2 , that is to say the train of pulses comprising the

  preamble, then the actual information message, the impulses

  can be distant from each other by 2, 3 or 4 ps. The message generator 5 also provides commands to the phase shifter 3 so that it changes the phase of the carrier frequency between two consecutive pulses of the message according to the information to be added. The conventional IFF mode 4 message is thus carrying information

  additional. The information added is therefore transmitted by

  differential phase, the phase shift being equal to 180 degrees or l radians. The added information consists in the presence or absence of phase jump ir rd of the carrier between pulses transmitted consecutively. Thus, if the completed messages are received by a receiver not intended to receive them, the complement will be invisible, the receiver will normally receive the message without the information added. This added information can be used for example for dating the message or to give this message redundancy

  in order to detect transmission errors.

  The answering receiver according to the invention, which is

  FIG. 2 is a coherent superheterodyne receiver in which the nominal frequency f0L emitted by a local oscillator 10 is chosen in a simple ratio with that of the frequency f 0 of the carrier wave of the received signal. This microwave signal is received by an aerial receiver 11 which transmits it to a UHF preamplifier 12. The preamplified signal is applied to a mixer 13 which also receives the signal from the local oscillator 10 via a multiplier 14. The intermediate frequency signal which is amplified by the IF amplifier 15 is thus obtained. The intermediate frequency IF is a sub-multiple of that of the local oscillator 10, and the local oscillator 10 allows the REF reference signal to be supplied. by means of a divider 16 with a quadriphase demodulator 17. The IF amplifier 15 comprises a detector array which delivers the detected signal FI, that is to say the signal received from the pulses received, which is transmitted to an IF device. in logic form 18 for obtaining clean logical signals. These logic signals are used in particular for the conventional exploitation of information transmitted by presence or absence of pulses at given times. On the other hand, the IF amplifier 15 also delivers a clipped IF signal, that is to say a signal whose amplitude is almost constant.

  whatever the level of the UHF signal received by the receiver.

  This clipped IF signal is applied to the IF input of the quad-phase demolisher 17, which on the other hand receives the reference signal REF of the same frequency. This demodulator 17 is conventional and delivers, after low-pass filtering, two output signals A and B as a function of the shift of phase 3

  between the IF and REF input signals.

A = acos B = a sin 6

= 6FI - SREF

  These signals A and B are each applied to an input of a phase-jump threshold detector 19. A protection circuit 20 against spurious pulses is connected to the output of the shaping circuit 18 and makes it possible to send a signal The output signals of the protection circuit 20 and the detector 19 are applied to an operating logic 21 which makes it possible to decode and to deliver the signals.

  various signals useful for the other responder's organs.

  One embodiment of the phase jump detector 19 and the

  protection circuit 20 against parasites is shown in Figure 3.

  The signals A and B obtained at the output of the demodulator 17 are

  applied to the inputs of a set of logic comparator amplifiers

  30, 31, 32, 33 as follows. Signal A is applied to

  the direct input of the comparator 30 and the inverting input of the comparator

  32. Signal B is applied to the direct input of comparator 31 and

  at the inverting input of the comparator 33.

  The inverting inputs of comparators 30 and 31 receive a signal from a constant threshold voltage source of ideal value

  + V = a sin 1/8 ,, / 8 being equal to 22 5. The direct inputs of comparisons

  32 and 33 receive the same signal but reversed either V = - a sin / 8.

  Under these conditions, the output signals D1 to D4 of the comparators 34 to 37 change as a function of the phase shift 6 according to the table.

shown in Figure 5.

  In practice, the threshold voltages are not strictly equal to their ideal value, which causes variations in the values of angles delimited by border values corresponding to the columns of Table 5. However, these variations do not modify the

these predetermined boundaries.

  By way of example, a 25% threshold voltage variation with respect to its ideal value, which is an extreme case, only leads to

  variation of about + 6 degrees in the position of the corresponding frontiers

  pendent. For a given column its boundaries are thus discarded

  of the ideal central value of the column of 22, 5 + 6 is 28, 5 at the most.

  The knowledge of the output signals D1 - D4 at a given instant thus makes it possible to locate in a column of the table 5 and to know consequently the value of 6, phase difference between the signals FI and REF, with a maximum error ú of + 28, 5 for an error on the voltage of

  threshold of 25%, extreme case in normal operation.

  The criterion for recognizing a phase jump of r between two successive pulses is determined by the set of values D1 to D4 which

  places these values in two columns of the table sufficiently wide apart.

  In practice the phase jump occurred when the two columns

  previously considered are separated by at least two other

  nes. Indeed, in this case, if 61 and 62 are the two phase shift

  between the IF and REF signals for two successive pulses, they correspond to

  Table 5 columns whose ideal central values are at least 135 degrees apart. Taking into account the error s, the minimum distance 162 - 1ll is then 162 - 611 <135 - 2 is 78 degrees. In order to recognize whether or not there has been a phase jump between the successive pulses of a message, the logic information D1-D4 is presented at the inputs of the four flip-flops D 34-37. The clock inputs of these flip-flops are actuated by the logic-reset pulses from the circuit 18, selected by the protection circuit 20 and delayed by a 1/2 pulse. Thus, the Q1-Q4 outputs of the flip-flops represent the phase measurement 61 of the pulse that was being received when the clock inputs of these flip-flops were actuated for the last time. Just before these clock inputs are actuated again, the outputs D1 - D4 of the comparators represent the

  phase measurement 62 of a new pulse being received.

  A set of logic gates 38-52 makes it possible to perform the phase hopping detection criterion determined from Table 5 resulting from the various logical states of the data D1, Q1 to D4, Q4. Three distinct cases

  recognition of phase jumps are presented.

  If the columns o are the measurements 61 and 62 are separated by two other columns, there is three change of value in the pairs of signals D1, Qi; D2, Q2; D3, Q3; D4, Q4. Conversely, if there are three changes of values, and only three, in the pairs of signals mentioned above, there are two columns interposed between those where 61 are located.

and 62.

  If the separation is three columns, two cases may occur.

  There is only a "1" in the column corresponding to 61, we see then that there is also a "1" in the column of 52. In addition the lines o

  appearing these "1's" are not contiguous. Reciprocally, this finding

  entation that there are three columns interposed between those o

place 51 and 62.

  There are two "1" in the column corresponding to 61 and two "1" in the column corresponding to 62. It is noted that these "1" change their line; this results in the case that the four pairs of value D1, Q1; D2, Q2; D3, Q3; D4, Q4 each have a change of

  value. Reciprocally, if the four value pairs above

  change each one, it follows that there are three inter-

  between those where 61 and 62 are located.

  The set of logic gates "OR-exclusive" 38-41 makes it possible to obtain

  output, respectively, the intermediary variables R, S, T and U such that

R = D1 Q Q1

S = D2 (Q2

T = D3 Q3

U = D4 Q4

  The first condition to achieve is the logical equation

  RSTU + RSTU + RSTU + IRSTU = RT (SOU) + SU (ROT)

  The second condition results in: R T D2D-4I-E 4 + SU IiD3-iQ'3 = RT (D2 + D4 + Q2 + Q4) + SU (D1 + D3 + Qi + Q3)

  The third condition translates to = RSTU.

  The set of doors 42 - 52 makes it possible to obtain the logical equation resulting from the union of these three equations. The resulting logical variable is therefore expressed by the equation: A = RTSQU ++ (D2o4 + Q2 + Q4) + SU [RT + (D1 + D3 + Q1 + IT RSTU = RTESQU + SU + (D2rT1 _C2 _7OZ4 ) SU [ROT + rD = r 3-U)] The variable A indicates if there was a phase change when it takes the value i and no change when it takes the value 0. This

  variable is stored by the flip-flop D 53, then it is exploited.

  The protection circuit 20 makes it possible to protect against parasitic pulses which can disturb the detection of phase jump in the message. To avoid this disadvantage, a pulse comb is available which falls in the middle of the time intervals where useful pulses are likely to occur. The synchronization signal applied to the clock input of the flip-flops D 34-37 is then constituted by the pulses of this comb which coincide with those of the message received. Indeed, the logic-shaped pulses coming from the circuit 18 arrive at the input of a recognition device of the preamble 54 which makes it possible to control the start and the synchronization of the clock 55 on the

  last impulse of the preamble. This last impulse makes it possible to obtain

  by a method known and not detailed herein the desired pulse comb that is to say a comb of 64 pulses of 1 fold. An "AND" gate 56 receives the output signal of the circuit 18 and the pulse comb, its output delivers

  the clock signal activating the D flip-flops 34-37 and 53.

  According to a second embodiment of the receiver which is shown in FIG. 5, the recognition of the phase jumps is carried out by means of a surface wave delay line 60. The receiver is only partially represented and the references of the elements identical to the first

realization have been preserved.

  The amplitude-corrected IF signals provided by the IF amplifier 15 are applied to the input of a power divider by four to provide four outputs, a first output of which feeds the surface wave line which has three outputs. exits. Each of these three outputs is connected

  at the "signal" input of a balanced demodulator 65, 66, 67 through

  An output of the surface wave line 60 delivers the pulses arriving with a delay of 2 μs with respect to the previous one or with respect to the last pulse of the preamble if this is the the first impulse of the message, another delivers the pulses that arrive with a delay of 3 ips and the last delivers those which arrive with a delay of 4 ps. The "local oscillator" inputs of the demodulators 65, 66, 67 are each powered by one of the three remaining outputs of the divider 61. When a pulse has been preceded by another pulse 2 ps before, or 3 folds, or 4 ps before as appropriate, the output of the corresponding demodulator 65, 66, 67 provides a positive or negative signal depending on whether the two pulses considered have the same phase or are shifted ir rd. The output of each demodulator 64-67 is connected to a threshold inverting amplifier respectively 68, 69, 70 which provides logic signals equal to 1 or 0 depending on whether the input signal is positive or negative. The pulses detected and reshaped by the circuit 18 are presented at the input of a four-stage shift register 71. This register 71 also receives at the control input the synchronization signal coming from the recognition circuit of the preamble 20 which provides the pulse comb of i ps whose forward edges coincide in time with the middle of the pulses likely to appear in the IFF mode 4 message after the fourth pulse of the preamble. So,

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  after the preamble, when a new pulse detected is presented to the input of the register 71, it contains a logic "1" in its second stage I. The first stage contains a zero because no pulse arrives before 2 lis. The register fills when each pulse is followed 2, 3 or 4 seconds later by a new pulse. The outputs of

  stages J and K are each connected to an inverting amplifier 72 and 73.

  The output of the amplifier 72 is connected to an input of two "AND" gates 74 and 75. The output of the amplifier 73 is connected to an input of the gate 75 which is also connected by another input to the output of the stage L. The output of the stage K is also connected to another input of the gate 74. A set of three "AND" gates 76, 77, 78 each have an input connected to the output of an amplifier 68 -70. The gate 76 is connected by another input to the output of the stage J of the register. The doors 77 and 78 are respectively connected to the output of the doors 74 and 75. The output of the doors 76-78 are connected to the inputs of an "OR" gate 79 whose output controls the data input of the flip-flop 48 which also receives the clock signal from the recognition circuit of the preamble 20. Thus all of the inverter amplifiers 65-67, the "AND" doors 74-78 and the "OR" gate 79 allow to present to the The input of flip-flop 49 is a logical "1" when the most recent of the preceding pulses has 2, 3 or 4 read before the new one, had a phase difference of T with the latter. The latch 53 thus stores the phase jump of the

  last impulse received compared to that which preceded it.

Claims (8)

  1. Transmitter of messages consisting of successive pulses   a fixed frequency carrier, these messages being composed of a   preamble and a variable message bearing the coded information,   in that it comprises means (3,5) for changing the phase of the carrier frequency between two consecutive pulses of the message in   function of the information to be transmitted.   Message transmitter according to claim 1, characterized in that the means (3,5) for changing the phase of the carrier frequency comprise a phase shifter (3) controlled by a message generator (5) which transmits the change this phase between two pulses   consecutive message depending on the information to be transmitted.   3. Receiver of messages consisting of successive pulses   a fixed frequency carrier of the type comprising receiving means (12, 13) for receiving a microwave signal and delivering at least one detected message formed of a preamble followed by a variable message carrying the information, characterized in that that means of   reception (12, 13) enable an intermediate frequency signal to be   modulated by the detected message, and in that it comprises first means (15, 18) for decoding the pulses of the message as a function of the code used on transmission and second means (17, 19) (60 - 79) to detect the phase jumps between consecutive pulses of the   variable message carrying the information.   Message receiver according to Claim 3, characterized in that the means for decoding the message pulses (10, 15, 18) comprise a quantizer amplifier FI (15) consisting of a detecting part delivering the envelope signal of the received pulses. to a logic shaping device (18), and a clipping portion delivering   an intermediate frequency (IF) signal.   Message receiver according to Claim 4, characterized in that the means for detecting the phase jumps (17, 19) comprise a quadriphase demodulator receiving, on the one hand, a clipped intermediate frequency signal and, on the other hand, a transmission signal. reference (REF) and outputs signals according to the phase shift between the intermediate frequency signal (IF) and the reference signal (REF) which are taken into account by a phase-jump threshold detector (19). whose   output is connected to the input of an operating circuit (21).   Message receiver according to claim 5, characterized in that it comprises a local oscillator (10) makes it possible to obtain by means of a   multiplier (14) a local frequency such as the international frequency   mediate (FI) either in a simple ratio with the carrier frequency (F0); and makes it possible to obtain, by means of a divider (16), the reference frequency signal (REF) this frequency (REF) being equal to the frequency Intermediate (FI).   Message receiver according to claim 5, characterized in that   the phase hopping detector (19) comprises a set of amplifiers   comparator circuits (31-33) receiving at one input a reference signal (+ V, -V) receiving on another input one of the output signals (A, B) of the quad-phase demodulator (17) and delivering a signal which is memorized by a set of D-type flip-flops (34-37), the output of each flip-flop being connected to an input of an "exclusive-OR" gate (38-41) while another input is connected to the output of the comparator considered, the outputs of these gates being connected to a set of logic gates (42-51) so as to determine at the output of the detector the logic magnitude (A) of the phase jump to transmit it via a D flip-flop (53) to a operating circuit (21).   Message receiver according to Claim 3, characterized in that the means for detecting the phase jumps (60-79) comprise a surface wave delay line receiving the frequency signal.   intermediary (FI) and providing through   cators (62-64) delayed signals to take into account each pulse of the message, these signals being applied to a set of demodulators (65-67), these demodulators receiving on the other hand the   intermediate frequency signal, which is a comparison of the impulse   received and providing a positive or negative signal depending on whether the input pulses are in phase or out of phase; a logic comprising an offset register (71) and a set of gates (68-79) receiving on the one hand the output signals of the demodulators (65-67) and on the other hand the detected intermediate frequency signal and the signal synchronization method for determining the logical magnitude of the phase jump for the   transmit via a flip-flop D- (53) to the operating circuit tation (21).