FR2556477A1 - METHOD AND APPARATUS FOR DETECTION BY ULTRASONIC TRANSDUCERS - Google Patents

Abstract

THE INVENTION CONCERNS ULTRASONIC DETECTION DEVICES. IT RELATES TO AN APPARATUS HAVING SEVERAL TRANSDUCERS CONNECTED TO PULSE GENERATORS 29 AND TO A MULTIPLEXER 30. A SELECTED TRANSDUCER MAY BE TRIGGERED AND AN ECHO SIGNAL MAY BE RECEIVED BY ANY OTHER SELECTED TRANSDUCER AND THE TRANSDUCER RECEIVED. A COMMON LINE 26. A CONTROL UNIT 28 ENSURES THE SEQUENTIAL OPERATION OF THE PULSE GENERATOR AND THE MULTIPLEXER, USING ADDRESS CODED SIGNALS. APPLICATION TO THE DETERMINATION OF FAULTS IN THE TANKS OF NUCLEAR POWER PLANTS.

Description

- 2556477

  The present invention relates to methods and apparatus for detecting, in particular for controlling

  multiplexed ultrasonic transducers.

  In one embodiment of the invention, a detection apparatus comprises a plurality of ultrasonic transducers, an excitation device of any one of

  transducers, and a device for transmitting

  an echo signal from a prede-

finished, at a common exit.

  The excited transducer may be the predetermined transducer. The apparatus may include a multiplexer unit connected to the transducers for receiving the echo signal from the predetermined transducer and transmitting

  an output signal by a common line.

  The apparatus may include a generator circuit

  pulses for receiving a coded and select signal

  the transducer to be energized according to

code.

  The multiplexing unit can receive a signal

  encoded so that it selects the predetermined transducer.

  The apparatus may include a control unit of the multiplexer unit and the pulse generator

  according to the coded command input signal.

  The invention also relates to a method for detecting

  which includes the excitation of any one of several

  ultrasonic transducers, and the transmission, to a common output line, of an echo signal from

of a predetermined transducer.

  The method may include the excitation of the

  selected in accordance with a coded transducer selection signal. The method may include selecting the predetermined transducer based on a coded signal

  echo transducer selection.

  The invention also relates to a method for verifying

  depot cation by implementing a method as defined above. The invention also relates to a test apparatus for detecting defects and comprising a

  apparatus of the type described above.

  Other features and advantages of the invention

  tion will become more apparent from the following description,

  with reference to the accompanying drawings in which: Figure 1 is a block diagram of a detection apparatus according to the invention; Figures 2, 3 and 4 together form a more detailed diagram of the apparatus of Figure 1;

  19 Figure 3A is a table showing the food

  tation of the apparatus; Figure 5 is a diagram of a pulse generator circuit; and Figure 6 is a timing diagram illustrating

a sequence of operations.

  The apparatus is housed generally in a metal enclosure 20 shown in FIG. 1, provided with suitable connectors 21, 22 mounted externally and intended to connect to piezoelectric ultrasonic transducers 0 to 11 and to an umbilical cable. 23. There are twelve individual plugs for the twelve transducers and one multi-plug 22 for the umbilical cord 23 which has sixteen lines of which four are unused. Four separate signals are transmitted by the cable 23. These signals are (a) an address code (b) a control code, (c) an echo signal, and (d)

supply currents.

  The coded address signal is transmitted by four lines 24 (J1 / 13, J1 / 14, J1 / 15, J1 / 16); it is a four-bit binary code and is used with the control code signal for the identification of one of the twelve channels. The control code signal is transmitted by four lines (J1 / 9, J1 / 10, J1 / 11, J1 / 12); three of the lines 25 transmit a three-bit binary code which is used for indicating, to the internal circuitry of the apparatus, the operation to be performed. The fourth line J1 / 9 transmits a synchronization signal which ensures the transmission of the control code signal in the circuits. The echo signal is the signal returned by the previously addressed ultrasonic piezoelectric transducer and is transmitted along a common line of echoes 26. The feed signals are transmitted through three lines 27 (J1 / 6, J1 / 7, J1 / 8) and they are at +15 V

  with return to earth. As shown in Figure 1, the cir-

  The internal bake can be considered as consisting of three sub-assemblies which are (a) the control assembly 28, (b) the pulse generator assembly 29 of the transducers, and (c) the multiplexing assembly of the signal transducers. echoes or

multiplexer 30.

  The control assembly 28 forms a number

  operational signals for the other two sub-

  assemblies 29, 30 following the signals of the control code.

  The operational signals 1 to 5, together with the corresponding control code, are as follows: Command code Operational signal 001 Preservation of multiplexer channel address by which the signal is to be received Preservation of pulse generator address (circuit generator) that must be triggered

  100 multi-validation validation

plex

  101 Trigger of pulse generator

  Multiplexing Muting Signal Preservation Each control code signal is fed into the trigger control unit 28, i.e.

  that, at the end of the clock period, the operational signal

  nel corresponding to the transmitted control code signal becomes available at the output of the control unit,

by the proper exit line.

  The pulse generator assembly 29 intended

  the transducer comprises twelve individual individual circuits.

  high voltage pulses with a converter

  binary-decimal which identifies the generating circuit

which is addressed.

  Each pulse generator circuit essentially comprises an energy storage capacitor (which is for example charged by a maximum voltage of

  700 V) and a chain of semiconductor devices.

  When the addressed pulse generator receives a "trip" signal, the semiconductor devices conduct so that the capacitor discharges into the

  piezoelectric crystal of the associated transducer.

  The multiplexer assembly only connects one

  only one transducer at a time at the common line 26 of echoes.

  The assembly 30 is based on a miniature circuit at half

  conductor housed in a plastic casing.

  However, it can be considered as consisting of a group of switches connected to a common output line, with an internal mechanism for identifying and closing

  each switch individually.

  All circuits operate from a + 15V supply, except for the 700V high voltage power supply that can be connected via an external outlet. The high voltage can also be created locally from the + 15 V supply as represented by the dashed line 80a in FIG. 1, this provision being able to be adopted when the umbilical cable must have

a reduced dimension.

  The device is now considered in more detail.

  The control assembly 28 comprises two integrated circuits 40, 41 (see FIG. 2). These two circuits 40, 41 are formed according to the CMOS technology, the circuit being a binary-decimal decoder made so that a binary number with four bits applied to the input of the circuit 40 ensures the selection and the excitation of the one of ten decimal lines of output. The circuit 41 is a double flip-flop RS. Five operational signals are required in the apparatus and are derived from the low order outputs of circuit 40. The term "low order outputs" refers to the digital state. There are ten outputs that correspond to the numbers 1 to 10, and they are individually addressed by a parallel input binary signal

  at four bits. Lower order outputs 1 to 5 appear

  to pins 14, 2, 15, 1, 6 as shown. The transmission of the control code signals from the cable 23 directly to the circuit 40 ensures the corresponding creation of the internal operational signals. The clock line J1 / 9 of the cable also transmits a signal to the circuit 40 so that it forms the most significant bit of the four bit input bit number; thus, while the clock signal is at a high level (i.e., at binary state 1), signals are only available at outputs exceeding 5. When the clock signal is at a low level (i.e., binary 0), the operational signal corresponding to the control code signal becomes available in one of the decimal output lines 40a to 40e. Only one of these lines of outputs

  A 40th is active at a particular time.

  The dual RS bistable circuit 41 ensures a certain

  interdependence between some of the operational signals

  tional. This is intended to ensure the inhibition of the multiplexing assembly and its isolation before the high voltage can be applied to the particular transducer

to excite.

  Two signals come from circuit 41 through

  The circuit 41 allows the transmission of only one signal via the line 71 when the signal of the line 70 keeps the multiplexer in the inhibited state. This is obtained by reference to the input, via line 74, of the signal of the line which prevents the piezoelectric crystal from being triggered (by maintaining the bistable circuit RS associated with the restored state), while the multiplexer 53 is validated. The signals of the lines 40c and 40d control the two bistable circuits. When the first bistable circuit is in its first (set) state, a signal can not pass in line 71 because the second bistable circuit is held in a second (restored) state; when the first bistable circuit is in its second (restored) state, a signal may be transmitted through line 71 by setting the second bistable circuit to a first (established) state. A signal of the line 40d passes the second bistable circuit of the state

  restored to the established state and triggers the pulse generator.

  sions. A signal from line 40c puts the first bistable circuit in the established state and validates the operation of the multiplexer. A signal of the line 40e puts the first bistable circuit in the restored state, inhibits the operation of the multiplexer, and allows the second bistable circuit

  to be established by the signal from line 40d.

  In the circuit shown in FIG. 5, the ultrasonic transducer with piezoelectric crystal would be mounted between the points marked A and L, the second designating the mass. This actually puts the transducer in series with

  the capacitor Cl1. During operation, the condensation

  Cll is charged up to a high voltage determined by the supply voltage (shown as

  700 V, for example) through resis-

  R20, R21 and diode D3. When charged, the capacitor C1 has retained enough energy to physically vibrate the crystal which in turn creates the necessary ultrasound. The energy is transmitted to the crystal by closing the series of SCR1 thyristors to

  SCR8, with the associated resistors R5 to R19 and the capacitors

  associates C3 to C10, connecting the condensers

  Cll in parallel with the transducer. The series of thyristors operates in avalanche mode so that the conductive state of the SCR1 thyristor causes the simultaneous conduction of all the thyristors. This arrangement provides automatic switching, i.e. the thyristors stop driving when capacitor C1 is discharged. The SCR1 thyristor is put in the conductive state via an input circuit, under the control of a transistor Q1, this circuit comprising components R1, R2, C1, C2, R3, R4, C37, C38, this circuit ensuring, in addition to the conversion of a 1 / P bistable input signal into a monostable signal, sufficient energy transmission

  for the thyristor to be turned on.

  An array of diodes D1, D2, D4, D5, R22, R23 ensures the dissipation of the energy conserved in the capacitor C1 in the ultrasonic transducer and not in the parallel paths that would exist during

  tripping under the control of a reverse voltage.

  When the crystal of the particular transistor has worked, it must return quickly to the state

  of rest so that he can receive the echo signals.

  For this purpose, an electrical damping is incorporated in the circuit, the damping being provided by a self L1 and a resistor R24. The degree of damping required depends on the transducer used; however, when a fixed fixed recovery time can be tolerated, the L1I choke and the R24 resistor can be fixed for all applications. The echo signal O / P is transmitted to the multiplexing circuit by an active buffer circuit essentially comprising a transistor Q2 as well as components R44, R45, R46, R47, R48, R49, C34, C36, D6, D7. The diodes

  D6 and D7 mounted back-to-back prevent the arrival

  plexeur 30 high voltages present inside the pulse generator. Signals below the clipping threshold of the diodes (i.e.

  echoes) are amplified by transistor Q2.

  Twelve circuits of the type described are present at the rate of one per transducer. The one to be operated is chosen by the address lines J1 / 13, J1 / 14, J1 / 15,

  J1 / 16, using the integrated circuit 50 forming a converts

  binary-decimal which also allows the storage or retention of the address signal. The signal of the line 71 is a disable enable signal transmitted to the converter 50; when it is validated, it excites the output decimal line that ensures its

  turn the control of the associated pulse generator.

  A signal transmitted by line 40b locks converter 50. The addressed output (and accordingly the corresponding transducer) is excited by the enable input signal of line 71 which is derived from

  control code signal for controlling the function

  selected generator. Integrated circuits 72,

  73 play the role of buffer circuits intended to trans-

  forming the low capacity signals from the circuit into a form compatible with the pulse generator circuits. The multiplexing subset of the echo signals comprises four integrated circuits 52, 53, 54,

55 (Figure 4).

  The main component is the circuit 53 which is a CMOS analog multiplexer. Using a four-bit input binary address, circuit 53 switches one of sixteen inputs to a common output using semiconductor switches. The analog inputs, in this example, are connected to the uitrasonores transducers and thus they undergo both the high voltage pulse and the corresponding echo signals. When the multiplexer 53 is inhibited, the inputs are in fact isolated from the internal circuits of the integrated circuits; this characteristic is used for the protection of the multiplexer against the high-voltage pulse which could damage it. The latch 52 keeps the address

  intended for the circuit 53 which constitutes the multiplexer.

  Only twelve of the sixteen available inputs of circuit 53 are used; unused entries

  are connected to the mass. The twelve inputs O / PA to O / PL (receive

  before the output signals of a pulse generator)

  are addressed using the address lines via

  circuit 52 which is a flip-flop circuit which

  transmits the address needed to switch the transducer

  suitable input when the multiplexer is enabled.

  The signal from line 70 is the validation signal-

  inhibition transmitted to the multiplexer.

  Circuits 54, 55 (with the respective components

  C35, R31, C15, R26, C12, R25, C15a, C14, RV1, C13, and RV2, C17, R30, R28, R29, C16, C18) are series-mounted analog amplifiers which provide in buffer and signal amplification

  echo and transmission along the return line 26.

  (J1 / 1 is the shield and J1 / 2 the soul).

  Although the control code signals can be created and applied randomly, it is very desirable for the operation to impose a predetermined sequence. For example, the validation of the multiplexer 53 would not bring anything if none of the transducers had been previously excited. Control code signals and address line signals can be obtained from a computer programmed to

desired sequence to the pulses.

  In most cases the sequence of operations is as follows: No Functions Code 1 Retain pulse generator 010 address to be triggered 2 Retain multiplexer address 001 3 Retain multiplexer inhibition 111 4 Trigger pulse generator 101 Retain validation of multiplexer 100 Step 1 is controlled by a signal of line 40b, step 2 by a signal of line 40a, step 3 by a signal of line 40e and line 70, step 4 by a signal of lines 40d and 71, and the step 5 by a signal of the lines 40c and 70. The signals of the steps 3 and 5, transmitted by the line 70, are bistable signals, that is to say

with two different states.

  The modification of the address during the retention period allows the simulation of the operational modes of echoes (that is to say, transmission and reception by the same

  channel) and in tandem. The period of each code is

  undermined by the clock frequency. Each code is controlled in the control set 28 during the clock period; thus a code can not be changed outside the clock period. The clock period can be changed; however, the high voltage pulse must have decreased to a safe level before the entire

  multiplexing can be validated. The period of impulse

  excitation voltage is for example 500 ns, allowing a maximum clock frequency of 1 MHz. Figure 6 is

  an example of a time diagram corresponding to the

  above in the case of a 1 MHz clock sequence. The pulse address conservation signal is en80, the receiver address conservation signal at 81, the multiplexer enable signal at 82, the pulse generator trigger signal.

in 83 and the impulse in 84.

  The electronic apparatus is intended to allow the connection of several transducers, for example a

  inspection head, at a remote location. In an example

  ple, the transducers are piezoelectric crystal ultrasonic transducers that are spaced around a

  circumferential welding of the reactor vessel

  which must be inspected. The apparatus is placed in the small ring delimited between the tank and its double envelope. The apparatus can individually control the transducers and can transmit an echo signal to

  a central set that is outside the envelope.

  The number of high voltage shielded cables, which are

  bulky and necessary between the inspection head

  and control room, is significantly reduced compared to a system with a power and control

  separated for each transducer.

  An operator may address a particular pulse generator circuit and may receive echo at a particular transducer which may be the one

  issued the program or one of the others. A generator

  The pulse generator may operate repeatedly and echoes may be received by the other transducers successively; alternatively, a number of transducers may be successively controlled and the echoes may be received by selected transducers according to a predetermined pattern, each

  trigger causing the formation of an echo signal.

  The trigger can be controlled by computer and

  can be automatic. For example, twelve trigger signals

  may be applied by the O / PA succes-

  sively, with the echoes received by the lines O / PA at O / PL successively. Then, twelve signals can be transmitted by the O / PB line, the echoes being received by the O / PA lines at O / PL, and so on until the transmission of twelve trigger signals by the O / PL line. This

  sequence can be carried out repeatedly

predefined valleys.

  When the transducer to receive the echo is different from the one that emitted the pulse, a second signal of suitable address is transmitted to the multiplexer

  before storing the address of the pulse generator

  and maintaining the address of the multiplexer.

  The echo signals may for example be transmitted to a visual display device at which inspection of the display and / or comparison to predetermined displays may give information about existence, nature, depth. or another characteristic of a defect. Echo signals can be transmitted to a computer that can perform calculations

  giving further information concerning a certain defect

conch.

Claims (10)

  1. A detection method, characterized in that it comprises the excitation of an ultrasonic transducer, chosen from among several, and the transmission to a common output line of an echo signal from a predetermined transducer. 2. Method according to claim 1, characterized in that it comprises the excitation of the selected transducer   according to a coded transducer selection signal.   3. Method according to one of claims 1 and 2,   characterized by comprising selecting the transducer   predetermined transmitter according to a coded selection signal an echo transducer.   4. Method for determining defects, characterized in that it comprises the implementation of a method according to   any one of the preceding claims.   5. Detection apparatus, characterized in that it comprises a plurality of ultrasonic transducers, a device (29) for exciting any one of the transducers, and a device (30) for transmitting an output.   an echo signal from a predefined transducer   completed. 6. Apparatus according to claim 5, characterized in that it comprises a multiplexing unit (30) connected to the transducers and intended to receive the echo signal of the predetermined transducer and to transmit a signal output to a common line. -   Apparatus according to claim 6, characterized in that the multiplexing unit (30) receives a signal   encoded so that the predetermined transducer is selected.   Apparatus according to any of the claims   5 to 7, characterized in that it comprises a general   pulser (29) for receiving a coded signal to select one of the transducers to be excited according to the code.   9. Apparatus according to one of claims 7 and 8,   characterized in that it comprises a control unit (28)   intended to ensure the sequential operation of the genera-   pulse transmitter and the multiplexing unit in a coded signal.   Apparatus according to claim 9, characterized in that the coded signals for the pulse generator (29), the multiplexing unit (30) and the unit   control (28) pass through a common cable.