FR2529034A1 - TRANSFORMER DRIVING CIRCUIT - Google Patents

Abstract

THE ATTACK CIRCUIT ACCORDING TO THE INVENTION INCLUDES A DETECTION CIRCUIT 8 TO DETECT POSITIVE AND NEGATIVE PEAK VALUES OF THE ALTERNATIVE SUPPLY VOLTAGE, AND WHICH CONTROLS SWITCHES 9A, 9B, 11A, 11B DESTINED TO REVERSE THE VOLTAGE D 'INPUT TO OBTAIN DOUBLE FREQUENCY OUTPUT VOLTAGE.

Description

Transformer driver circuit

  The present invention relates to a circuit for-

transformer plate.

  In a conventional transformer circuit,

  the latter is directly connected to a power source

  statement of a commercial frequency of 50 Hz (or 60 Hz)

  But this direct attack disposition with a

  power supply has the defect that the transformer

  dough must be large and heavy and also of a high manufacturing price In particular, this defect becomes very

  important when the transformer supplies a large load

  bearing. An object of the invention is therefore to propose a

  transformer drive circuit which eliminates in-

  conveniences of the prior art mentioned above

  known and which allows to realize a small transformer

  tesdimensions, light and of low manufacturing price.

  Other features and advantages of the

  vention will appear during the description which goes

  follow several examples of implementation and

  referring to the appended drawings in which: FIG. 1 is a diagram of a transformer drive circuit according to a first embodiment of the invention,

  Figure 2 shows waveforms of voltage

  illustrating the operation of the driving circuit, FIG. 3 is a detailed diagram of a circuit for detecting peak values of the circuit of FIG. 1,

  Figure 4 shows waveforms of voltage

  to illustrate how the fault circuit works

  tector, and Figure 5 is a diagram of a transformer drive circuit according to another embodiment of

the 1 invention.

  In Figure 1, reference 1 designates a source

  ce of alternating current (50 or 60 Hz), reference 2

  designates a transformer drive circuit, the

  reference 3 designates a transformer and reference 4

a charge.

  In the transformer drive circuit 2, a peak value detection circuit 8 is connected

  tee in parallel with two 5 r lines 7 which connect two terminals

  input nes 5 and two output terminals 6 respectively, the output terminal of the peak value detection circuit 8 being connected to two switches 9 A and 9 B connected in series in lines 7, and this output terminal is also connected to an inverter 10 The terminal

  inverter output 10 is connected to two switches

  tors l A and ll B arranged respectively in parallel

on lines 7.

  The input of switch 1 l A is connected to the input of switch 9 A and the output of switch 11 A is connected to the output of switch 9 B, while the input of switch 11 B is connected to the input of switch 9 B and the output of switch li B is

  connected to the 9 A switch output.

  In other words, the arrangement of the connections between the switch 9 A and the switch 11 B, and between the switch 9 B and the switch 11 A shows the voltage from the input terminals 5 alternately to the output terminals 6 in each half-wave, in response to the output signal of the value detection circuit 8

  of the inverter 10 output signal.

  The operation of this circuit will now be

described next to Fig 2.

  In this figure, (A) represents the waveform of voltage (supply voltage) at the input terminals 5, (B) represents the waveform of the output voltage of the peak value detection circuit 8 (which increases for a positive peak value of the supply voltage or an approximate value and decreases for a negative peak value of the supply voltage or its value

  approximate), (c) shows the output waveform of the

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  and switches 11 A and 11 B are closed when the voltage

  output value of circuit 8 for detecting the value of

  peak increases (when the output voltage of the invert-

  switcher 10) and in turn, the switches 9 A and

  9 B are closed and switches 11 A and 11 B are open

  green when the output voltage of the detection circuit 8

  peak value decreases (when the voltage of

output of the inverter 10 increases).

  In other words, during an alternation in which the output (B) of the peak value detection circuit 8 appears, the inverted waveform of the input voltage (1) appears as the output voltage (D) and during a other alternation in which

  the output (C) of the inverter 10 appears, the shape of

  of the input voltage (1) appears as the voltage of

exit (D).

  Therefore, the output voltage (transformer input voltage) (D) has a frequency

  double that of the input voltage (dtali-

statement) (A).

  In this way, if the voltage frequency applied to the transformer 3 is twice that of the supply voltage, that is to say a frequency applied directly in a current manner, it is sufficient that the section of the magnetic circuit of the transformer 3 is half of that required as shown in the equation below, so that the transformer

  3 is small, light and its price is also reduced.

  If we assume that the effective value of the

  voltage applied to the transformer is (Vy), the intensity

  maximum sity of the magnetic flux of transformer Bm (Wb / cm) is Bm E / 4, 44 f N 1 Ai x 10-8 = E / f Ai o K = E / 4.44 N 1 x 10-8 (f: applied frequency (Hz), Ni: number of turns

  primary winding, Ai: effective cross-section of the

  cooked magnetic (cm 2)) Therefore, if the frequency is twice that of the current value, it is sufficient that the section

  of magnetic circuit is half the ha-section

  ritual. In a second embodiment illustrated in FIG. 5, bipolar switches 12 A and 12 B can be used to switch the

  outputs of the peak value detection circuit 8.

  In addition, switches & semiconductors

  can be used for switches 9 A, 9 B, 11 A and 11 B; and 12 A and 12 B.

  As described above, with the cir-

  attack baking according to the invention, since the frequency of the voltage applied to the transformer is twice that applied to a current transformer, it is sufficient that the section of the magnetic circuit is half that of the prior art so that the transformer can be small, light and its price

can be reduced.

  Of course, many modifications can

  can be made to the embodiments described and illustrated by way of nonlimiting example without

depart from the scope of the invention.

Claims (9)

  1 Inter-transformer transformer circuit   wedged between an alternative power source and the transformer, characterized in that it includes   input terminals (5) for receiving alternating voltage   of said alternative power source,   output terminals (6) to drive the transformer -   with said alternating voltage, a device (8) for detecting practically peak values of the alternating voltage, said detection device comprising two input connections connected to the input terminals and an output connection for producing an output signal at two stages, and a switching device (9 A, 9 B, li A, 11 B; 12 A, 12 B) comprising several entry points the entry points comprising first second and third entry points and several - exit points the exit points comprising first # second, third and fourth exit points, said first and second input points being connected to the input terminals respectively by said input connections, said first and second points of exit   forming a first group and said third and fourth-   me exit points forming a second group, said third   sth entry point being connected to said connection   output to select one of said first and second   cond groups in response to said output from said device   detection, said switching device being arranged   to alternately reverse the alternating voltage,   2 Circuit according to claim 1, character-   in that said detection device (8) comprises a waveform rectifier (8 a) for transforming the alternating waveform of the power source into a positive and negative rectangular waveform, a rectifier (8b) to pass only said positive rectangular waveform of the two rectangular waveforms and a voltage controlled oscillator (8e) which produces a rectangular waveform   having a double frequency of said rectifier.   3 Circuit according to claim 2, character-   risè in that said voltage controlled oscillator (8 e) is included in a phase locked loop of the detection device.   4 Circuit according to claim 1, character-   rised in that said output from the detection device (8) delivers a positive rectangular waveform with two stages, with high levels and low levels   in correspondence with the peaks of the alternating voltage nativ e.   Circuit according to claim 1, characterized in that said output of the detection device (8) delivers a rectangular waveform having the same 8 alternation duration corresponding to a peak duration at peak of alternating voltage.   6 Circuit according to claim 1, character-   laughed in that said switching device comprises   two pairs (9 A, 9 B, 11 A, 11 B) of switching elements   tion and an inverter (o 10), each pair of elements being locked and unlocked in a mutually reversed mode   by said inverter in response to the output of said device positive detection.   7 Circuit according to claim 6, character.   laughed in that said switching elements (9 A, 9 B,   11 A, 11 B, 12 A, 12 B) are semiconductor switches teurs.   8 Circuit according to claim 1, character-   in that said switching device comprises two switching elements (12 A, 12 B), each element being locked and unlocked alternately in response to the   output of said detection device.   9 Circuit according to claim 8, character-   in that said switching elements (12 A, 12 B) are two-way switches.   Circuit according to claim 9, character-   laughed in that said bilateral switches (12 A, 12 B)   are semiconductor switches.