JPS5976169A - Current balancing system for parallel connection thyristors - Google Patents

Current balancing system for parallel connection thyristors

Info

Publication number
JPS5976169A
JPS5976169A JP18607682A JP18607682A JPS5976169A JP S5976169 A JPS5976169 A JP S5976169A JP 18607682 A JP18607682 A JP 18607682A JP 18607682 A JP18607682 A JP 18607682A JP S5976169 A JPS5976169 A JP S5976169A
Authority
JP
Japan
Prior art keywords
current
thyristor
thyristors
parallel
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18607682A
Other languages
Japanese (ja)
Inventor
Haruki Yoshikawa
春樹 吉川
Kenichi Arai
研一 荒井
Motoshirou Kaneda
金田 元四郎
Takashi Arai
隆 新井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP18607682A priority Critical patent/JPS5976169A/en
Publication of JPS5976169A publication Critical patent/JPS5976169A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/125Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M3/135Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
    • H02M3/137Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/142Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)

Abstract

PURPOSE:To balance the current shares among a plurality of thyristors to be fired in parallel connection by connecting reactors in series with the respective thyristors and connecting a series of an auxiliary thyristor and a condenser in parallel therewith. CONSTITUTION:Branching reactors 4, 5 are connected in series with respective main thyristors 1, 2. An auxiliary thyristor 3 is connected in parallel with a series circuit of the thyristors 1, 2 and the reactors 4, 5 in series with a condenser 6. The half wave of the vibrating current produced due to the firing of the thyristor 3 of the resonance frequency determined by the reactors 4, 5 and the condenser 6 is superposed on the firing currents of the thyristors 1, 2, thereby improving imbalance of the branching current between the thyristors 1 and 2.

Description

【発明の詳細な説明】 本発明は、複数個のサイリスタを並列に接′続して同時
に点弧するサイリスタにおける電流平衡化方式に関する
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a current balancing method in a thyristor in which a plurality of thyristors are connected in parallel and fired simultaneously.

一般に、半導体素子の電圧電流特性は半導体素子によっ
てその特性のばらつきが大きく、複数個の半導体素子を
並列接続して作動させる場合に、各素子に流れる電流の
大きさに著しい不均等が生ずることはよく知られている
。特に、電力用サイリスタについては、通常の大きさの
ゲー・ト電流を供給して作動させた場合に、第1図に示
すように小電流領域において、一旦素子電圧降下が増大
した後に急激に減少し、その後に再度徐々に増大するい
わゆる段電圧特性を呈する傾向があるので、この段電圧
特性はゲー) 73流を増大させれば抑制することがで
きるが、かかる抑制を行なわないと、第2図に示すよう
に並列接続した複数個のサイリスタA/、/16コ・・
・の中に段電圧特性を呈する素子が含まれておれば、そ
の段電圧特性に基づいて、それら複数個のサイリスタを
同時に点弧したときに電流分担に著しい不均等が生ずる
In general, the voltage-current characteristics of semiconductor devices vary widely depending on the semiconductor device, and when multiple semiconductor devices are connected in parallel and operated, it is unlikely that significant inequalities will occur in the magnitude of the current flowing through each device. well known. In particular, when a power thyristor is operated by supplying a normal gate current, the element voltage drop increases once in the small current region, as shown in Figure 1, and then rapidly decreases. However, since there is a tendency for the so-called step voltage characteristic to gradually increase again after that, this step voltage characteristic can be suppressed by increasing the As shown in the figure, multiple thyristors A/, /16 are connected in parallel...
If an element exhibiting a step voltage characteristic is included in the step voltage characteristic, significant unevenness will occur in current sharing when a plurality of thyristors are fired simultaneously based on the step voltage characteristic.

すなわち、並列接続した一個のサイリスタ/161゜/
16コが第3図に示すように、いずれも収電圧を呈する
電圧電流特性を有していた場合に、それらのサイリスタ
A / 、 Aコを同時に点弧させて回路電流を零もし
くは零付近から増大させていくと、各サイリスタ素子に
は、それぞれの電圧電流特性に応じた大きさの電流が流
れ、回路電流をOAから徐々に増大させていくと、その
電流増大に伴って電圧降下も徐々に増大していく。その
際、サイリスタ素子A/、A、2とが並列に接続されて
いるので、名累子に印加される電圧は同じ値であり、し
たがって・電圧降下が増大して素子A/の設電圧v1を
超えると、素子A/の電圧降下はその設電圧を超えて電
圧値V、まで急激に減少した後、再び徐々に増大する。
In other words, one thyristor connected in parallel /161°/
As shown in Figure 3, if all of the 16 thyristors have voltage-current characteristics that exhibit a collected voltage, the circuit current can be reduced from zero or near zero by firing those thyristors A/A and A at the same time. As the current increases, a current flows through each thyristor element according to its voltage-current characteristics, and as the circuit current is gradually increased from OA, the voltage drop gradually increases as the current increases. It continues to increase. At this time, since thyristor elements A/, A, and 2 are connected in parallel, the voltage applied to the thyristor element is the same value, so that the voltage drop increases and the set voltage v1 of element A/ , the voltage drop across element A/ exceeds its set voltage and rapidly decreases to the voltage value V, and then gradually increases again.

その際、素子/f6/の電流は増大するが素子温、2の
電流は、一旦減少した後に、電圧降下が電圧Vbを超え
ると再び増大する。素子AIの電流が図示の電流値11
に達したときの電圧降下は図示の電圧値Vcであり、そ
のときにおける素子准コの電流は図示の電流値■2とな
るので翫両者間には著しい不均等な分流比が生ずること
になる。
At this time, the current of element /f6/ increases, but the current of element temperature 2 once decreases and then increases again when the voltage drop exceeds voltage Vb. The current of element AI is the current value 11 shown in the figure.
The voltage drop when it reaches is the voltage value Vc shown in the diagram, and the current of the element at that time becomes the current value ■2 shown in the diagram, so a significantly unequal shunt ratio will occur between the two wires. .

以上に詳述したように、直流電力回路のサイリスタ遮断
器のように、サイリスタ点弧後の回路電流が零から増大
するサイリスタ回路装置については、従来、設電圧特性
を呈するサイリスクは、並均等が生ずる。
As detailed above, for thyristor circuit devices such as thyristor circuit breakers in DC power circuits in which the circuit current increases from zero after the thyristor is fired, the thyristor risk exhibiting the set voltage characteristics has conventionally been arise.

本発明の目的は、設電圧特性を有するサイリスタを使用
しても並列接続における電流分担をノくランスさせるこ
とのできる電流平衡化方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a current balancing method that can balance current sharing in parallel connections even when using thyristors having set voltage characteristics.

すなわち1本発明は、並列に接続して点弧すべき複数個
のサイリスタに直列にりアクトルをそれぞれ接続すると
ともに補助サイリスタおよびコンデンサの直列接続を並
列に接続し、前記補助サイリスタを点弧することにより
、並列接続され°Cいるサイリスタ間の電流分担をバラ
ンスさせるようにしたことを特徴とするものである0 以下に図面を餘照して本発明の詳細な説明する。
That is, one aspect of the present invention is to connect an actor in series to a plurality of thyristors that are to be connected in parallel and to be fired, and to connect a series connection of an auxiliary thyristor and a capacitor in parallel, and to ignite the auxiliary thyristor. The present invention is characterized in that the current sharing between the thyristors connected in parallel is balanced by the following.The present invention will be described in detail below with reference to the drawings.

まず、本発明実施例fλ個のサイリスタを並列点弧する
場合について第4I図に示す。図示の構成において、1
..2が並列に接続して同時に点弧すべき主サイリスタ
であり、3〜7が本発明により主サイリスタ1.コに流
れる電流平衡化を行なわせるために付加した回路要素で
ある。すなわち、lljは主サイリスタ/、Jにそれぞ
れ直列に介挿した分流リアクトルであり、3はコンデン
サ6と直列にして主サイリスタl、コおよび分流リアク
トル+、jの直列回路に並列に接続した補助サイリスタ
であり、7はコンーデンサ4を図示の極性、すなわち、
補助サイリスタぶとは逆の極性に充電するための補充電
回路である。かがる構成の装置においては、分流リアク
トルl、!とコンデンサ6とによって定まる共振周波数
の補助サイリスタ30点弧によって生ずる振動電流の半
波を主サイリスタ/、−の点弧電流に重畳することによ
り、主回路電流が小さい方のサイリスタ素子にその設電
圧に対応する値を超えた電流を流し、主サイリスタl、
λ間の分流電流の不均等を改善するようにしである。
First, FIG. 4I shows an embodiment of the present invention in which fλ thyristors are fired in parallel. In the illustrated configuration, 1
.. .. 2 is the main thyristor which is connected in parallel and should be fired at the same time, and 3 to 7 are the main thyristors 1. This is a circuit element added to balance the current flowing through the circuit. That is, llj is a shunt reactor inserted in series with the main thyristors / and J, and 3 is an auxiliary thyristor connected in series with the capacitor 6 and connected in parallel to the series circuit of the main thyristors l, ko and shunt reactors + and j. and 7 connects the capacitor 4 to the polarity shown, that is,
The auxiliary thyristor is an auxiliary charging circuit for charging with opposite polarity. In a device with a bending configuration, the shunt reactor l,! By superimposing the half-wave of the oscillating current generated by the firing of the auxiliary thyristor 30 with the resonant frequency determined by the auxiliary thyristor 30 and the capacitor 6 on the firing current of the main thyristor /, -, the set voltage is applied to the thyristor element whose main circuit current is smaller. A current exceeding the value corresponding to the main thyristor l,
This is intended to improve the non-uniformity of shunt current between λ.

上述のように作用する第ダ図示の装置における各部電圧
電流波形を第3図に示す。すなわち、主サイリスタλは
、その電圧電流特性を第6図に示すように、主サイリス
タlの分流電流が段電圧部分を超えた電圧値V1 、V
lにおいても、自己の設電圧部分を越えていないがため
に、主回路電流はその大部分が主サイリスタlに流れる
ので、分流電流に著しい不均等が生ずる。しかして、第
3図に示す時点tOにおいて補助サイリスタ3に図示の
ようなゲート信号を印加すると、補助サイリスタ3経路
を介し、補助サイリスタ3による振動電流の半波が、番
5図に示すように、主サイリスタl。
FIG. 3 shows voltage and current waveforms at various parts in the device shown in FIG. 3, which operates as described above. That is, as shown in FIG. 6, the main thyristor λ has voltage-current characteristics at voltage values V1 and V at which the shunt current of the main thyristor l exceeds the step voltage portion.
Even in thyristor 1, since the voltage does not exceed its own set voltage, most of the main circuit current flows through main thyristor 1, resulting in significant unevenness in the shunt currents. Therefore, when a gate signal as shown in the figure is applied to the auxiliary thyristor 3 at the time tO shown in FIG. , main thyristor l.

−にそれぞれの分流点弧電流に重畳して流れる。− flows superimposed on each branch ignition current.

したがって、分流リアクトルク、jのインダクタンス値
を適切な同一値に選定すれば、その振動電/ 流のほぼ丁ずつが主サイリスタl2.2の分流電流にそ
れぞれ重畳して流れることになり、主サイリスタコの回
路電流値がその重畳によって増大するので、そのサイリ
スタ素子の電圧電流特性における設電圧部分を超えて作
動することになる。しかして、サイリスタが一旦その設
電圧部分を“超えると、その電圧電流特性によって決ま
る電流値にて安定に動作するので、上述した分流電流の
不均等は著しく改善される。
Therefore, if the inductance value of the shunt reactor torque, j, is selected to be suitably the same value, approximately 2 of the oscillating current/current will flow superimposed on the shunt current of the main thyristor l2.2, and the main thyristor l2. Since the circuit current value of the thyristor element increases due to the superposition thereof, the thyristor element operates beyond the set voltage portion of the voltage-current characteristics of the thyristor element. Once the thyristor exceeds its set voltage, it operates stably at a current value determined by its voltage-current characteristics, so the above-mentioned non-uniformity of shunt currents is significantly improved.

すなわち−第1図に示す時点toより前の状態において
は、第を図の電圧電流特性に示すように、主サイリスタ
/の電流はa点に示1値であり為また、主サイリスタλ
の電流はb点に示す値である。
That is, in the state before time t shown in Fig. 1, the current of the main thyristor / is 1 value at point a, as shown in the voltage-current characteristics of Fig. 1, and therefore the main thyristor λ
The current is the value shown at point b.

しかして、時点t、oにて補助サイリ′スタ3を点弧す
ると、主サイリスタlおよび−の電流がともに増大して
、それぞれ、b点および0点に示す値に達するので、主
サイリスタコの電流もその設電圧部分を超えた値となる
。したがって、その後に、重畳した振動電流が減少し°
Cも、主サイリスタlお上びコの分流電流は、それぞれ
点eおよび点fに示す値を安定に保持するので、各主サ
イリスタl1.2間の分流電流の不均等が著しく改善さ
れたことになる。
Therefore, when the auxiliary thyristor 3 is fired at time points t and o, the currents in the main thyristors l and - increase and reach the values shown at point b and point 0, respectively, so that the currents in the main thyristor The current also has a value that exceeds the set voltage portion. Therefore, after that, the superimposed oscillating current decreases.
In C, the shunt currents of the main thyristors L and I stably maintain the values shown at points e and f, respectively, so the unevenness of the shunt currents between the main thyristors l1 and 2 is significantly improved. become.

なお、補助サイリスタ30点弧制御方式としては次の参
方式を採用することができる。すなわち、点弧するタイ
ミングにより大別して、周期的に点弧パルスを補助サイ
リスタ3に印加する方式と、主サイリスタ/、2の分流
電流に不均等が生じたときにのみ点弧パルスを補助サイ
リスタ3に印加する方式とがあり、さらに、点弧時期に
より大別したλ方式のそれぞれについて、点弧制御回路
を作動させる条件として、常時点弧パルスを発生させる
方式と、負荷電流が単一のサイリスタの許容電流値を超
えて2個のサイリス々の並列点弧を必要とする場合のみ
補助サイリスタ用の点弧パルスを発生させる方式とがあ
る。
Note that the following system can be adopted as the auxiliary thyristor 30 firing control system. In other words, they can be roughly divided into two methods depending on the firing timing: one is to periodically apply a firing pulse to the auxiliary thyristor 3, and the other is to apply a firing pulse to the auxiliary thyristor 3 only when there is an imbalance in the shunt currents of the main thyristors. Furthermore, for each of the λ methods, which are roughly divided according to the ignition timing, there are methods that constantly generate a ignition pulse as a condition for operating the ignition control circuit, and methods where the load current is applied to a single thyristor. There is a method in which a firing pulse for the auxiliary thyristor is generated only when the allowable current value of the thyristor is exceeded and parallel firing of two thyristors is required.

【図面の簡単な説明】[Brief explanation of the drawing]

第7図はサイリスタの■L電圧電流特性例を示す特性曲
線図、第2図は従来のサイリスタ並列点弧回路の構成を
示す回路図、第3図は同じくその従来のサイリスタ並列
点弧の動作の舷梯を示す特性曲線図、第ダ図は本発明方
式によるサイリスタ並列点弧装置の構成例を示す回路図
、第5図は同じくその各部電圧電流波形を示す波杉図、
第6図は同じくその動作の態様を示す特性曲線図である
。 !、コ・・・(主)サイリスタ、 3・・・補助サイリスタ、 ゲ、j・・・分流リアクトル、“ 6・・・コンデンサ、 7・・・補充電回路。 特許出願人 富士電機製造株式会社 第5図
Figure 7 is a characteristic curve diagram showing an example of L voltage and current characteristics of a thyristor, Figure 2 is a circuit diagram showing the configuration of a conventional thyristor parallel firing circuit, and Figure 3 is the operation of the conventional thyristor parallel firing circuit. Figure 5 is a circuit diagram showing a configuration example of a thyristor parallel ignition device according to the present invention, and Figure 5 is a wave diagram showing voltage and current waveforms at various parts thereof.
FIG. 6 is a characteristic curve diagram showing the mode of operation. ! , ko... (main) thyristor, 3... auxiliary thyristor, ge, j... shunt reactor, " 6... capacitor, 7... auxiliary charging circuit. Patent applicant: Fuji Electric Manufacturing Co., Ltd. Figure 5

Claims (1)

【特許請求の範囲】[Claims] l)並列に接続して点弧すべき複数個のサイリスタに直
列にリアクトルをそれぞれ接続するとともに補助サイリ
スタおよびコンデンサの直列接続を並列に接続し、前記
補助サイリスタを点弧することにより、並列接続されて
いるサイリスタ間の電流分担をバランスさせるようにし
たことを特徴とする並列接続サイリスタの電流平衡化方
式。
l) By connecting a reactor in series with each of the plurality of thyristors to be connected in parallel and fired, and connecting a series connection of an auxiliary thyristor and a capacitor in parallel, and igniting the auxiliary thyristor, the thyristors are connected in parallel. A current balancing method for parallel-connected thyristors characterized by balancing the current sharing between the thyristors.
JP18607682A 1982-10-25 1982-10-25 Current balancing system for parallel connection thyristors Pending JPS5976169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18607682A JPS5976169A (en) 1982-10-25 1982-10-25 Current balancing system for parallel connection thyristors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18607682A JPS5976169A (en) 1982-10-25 1982-10-25 Current balancing system for parallel connection thyristors

Publications (1)

Publication Number Publication Date
JPS5976169A true JPS5976169A (en) 1984-05-01

Family

ID=16181959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18607682A Pending JPS5976169A (en) 1982-10-25 1982-10-25 Current balancing system for parallel connection thyristors

Country Status (1)

Country Link
JP (1) JPS5976169A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01179671U (en) * 1988-06-08 1989-12-22
CN102064689A (en) * 2010-12-30 2011-05-18 南京航空航天大学 Automatic homogeneous flow technology for connecting diodes in parallel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01179671U (en) * 1988-06-08 1989-12-22
CN102064689A (en) * 2010-12-30 2011-05-18 南京航空航天大学 Automatic homogeneous flow technology for connecting diodes in parallel

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