FR2508669A1 - Dispositif logique programmable de prise, traitement et transmission de donnees - Google Patents

Dispositif logique programmable de prise, traitement et transmission de donnees Download PDF

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Publication number
FR2508669A1
FR2508669A1 FR8112908A FR8112908A FR2508669A1 FR 2508669 A1 FR2508669 A1 FR 2508669A1 FR 8112908 A FR8112908 A FR 8112908A FR 8112908 A FR8112908 A FR 8112908A FR 2508669 A1 FR2508669 A1 FR 2508669A1
Authority
FR
France
Prior art keywords
memories
comparator
bus
register
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8112908A
Other languages
English (en)
French (fr)
Other versions
FR2508669B1 (enExample
Inventor
Jean Engdahl
Jerome Fomraz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fordahl SARL
Original Assignee
Fordahl SARL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fordahl SARL filed Critical Fordahl SARL
Priority to FR8112908A priority Critical patent/FR2508669A1/fr
Priority to US06/386,798 priority patent/US4510602A/en
Publication of FR2508669A1 publication Critical patent/FR2508669A1/fr
Application granted granted Critical
Publication of FR2508669B1 publication Critical patent/FR2508669B1/fr
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/045Programme control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/10Plc systems
    • G05B2219/13Plc programming
    • G05B2219/13084Rom or eprom with conditional instructions
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/10Plc systems
    • G05B2219/15Plc structure of the system
    • G05B2219/15067Using a mixture of memories

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Executing Machine-Instructions (AREA)
FR8112908A 1981-06-24 1981-06-24 Dispositif logique programmable de prise, traitement et transmission de donnees Granted FR2508669A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR8112908A FR2508669A1 (fr) 1981-06-24 1981-06-24 Dispositif logique programmable de prise, traitement et transmission de donnees
US06/386,798 US4510602A (en) 1981-06-24 1982-06-09 Programmable logic apparatus for entering, processing and transmitting data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8112908A FR2508669A1 (fr) 1981-06-24 1981-06-24 Dispositif logique programmable de prise, traitement et transmission de donnees

Publications (2)

Publication Number Publication Date
FR2508669A1 true FR2508669A1 (fr) 1982-12-31
FR2508669B1 FR2508669B1 (enExample) 1984-08-10

Family

ID=9260056

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8112908A Granted FR2508669A1 (fr) 1981-06-24 1981-06-24 Dispositif logique programmable de prise, traitement et transmission de donnees

Country Status (2)

Country Link
US (1) US4510602A (enExample)
FR (1) FR2508669A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0199423A1 (en) * 1985-04-26 1986-10-29 Koninklijke Philips Electronics N.V. Data source system including a counter/comparator circuit and microprocessor having multiple outputs which are to be simultaneously activated

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135695A (ja) * 1983-01-24 1984-08-03 Mitsubishi Electric Corp 半導体記憶装置
US4586167A (en) * 1983-01-24 1986-04-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
US4876671A (en) * 1985-04-30 1989-10-24 Texas Instruments Incorporated Semiconductor dynamic memory device with metal-level selection of page mode or nibble mode
US5109353A (en) 1988-12-02 1992-04-28 Quickturn Systems, Incorporated Apparatus for emulation of electronic hardware system
US5329470A (en) * 1988-12-02 1994-07-12 Quickturn Systems, Inc. Reconfigurable hardware emulation system
US5369593A (en) * 1989-05-31 1994-11-29 Synopsys Inc. System for and method of connecting a hardware modeling element to a hardware modeling system
US5353243A (en) * 1989-05-31 1994-10-04 Synopsys Inc. Hardware modeling system and method of use
JP2941135B2 (ja) * 1992-01-24 1999-08-25 富士通株式会社 疑似lsi装置及びそれを用いたデバッグ装置
US5680583A (en) * 1994-02-16 1997-10-21 Arkos Design, Inc. Method and apparatus for a trace buffer in an emulation system
US5841967A (en) * 1996-10-17 1998-11-24 Quickturn Design Systems, Inc. Method and apparatus for design verification using emulation and simulation
US5960191A (en) * 1997-05-30 1999-09-28 Quickturn Design Systems, Inc. Emulation system with time-multiplexed interconnect
US5970240A (en) * 1997-06-25 1999-10-19 Quickturn Design Systems, Inc. Method and apparatus for configurable memory emulation
EP1494100A1 (de) * 2003-06-30 2005-01-05 Siemens Aktiengesellschaft Vorrichtung und Verfahren zur parametrierbaren Steuerung
US7555424B2 (en) 2006-03-16 2009-06-30 Quickturn Design Systems, Inc. Method and apparatus for rewinding emulated memory circuits
US8799278B2 (en) * 2012-10-01 2014-08-05 DISCERN, Inc. Data augmentation based on second-phase metadata

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2444965A1 (fr) * 1978-12-22 1980-07-18 Armancourt Etud Const Meca Automate programmable universel

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4380805A (en) * 1980-09-08 1983-04-19 Mostek Corporation Tape burn-in circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2444965A1 (fr) * 1978-12-22 1980-07-18 Armancourt Etud Const Meca Automate programmable universel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0199423A1 (en) * 1985-04-26 1986-10-29 Koninklijke Philips Electronics N.V. Data source system including a counter/comparator circuit and microprocessor having multiple outputs which are to be simultaneously activated

Also Published As

Publication number Publication date
US4510602A (en) 1985-04-09
FR2508669B1 (enExample) 1984-08-10

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