FR2498763B1 - - Google Patents
Info
- Publication number
- FR2498763B1 FR2498763B1 FR8101463A FR8101463A FR2498763B1 FR 2498763 B1 FR2498763 B1 FR 2498763B1 FR 8101463 A FR8101463 A FR 8101463A FR 8101463 A FR8101463 A FR 8101463A FR 2498763 B1 FR2498763 B1 FR 2498763B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Logic Circuits (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8101463A FR2498763A1 (fr) | 1981-01-27 | 1981-01-27 | Systeme de test et de visualisation d'etats de fonctionnement d'un circuit logique |
| EP19820400124 EP0057147B1 (fr) | 1981-01-27 | 1982-01-22 | Système de test et de visualisation d'états de fonctionnement d'un circuit logique |
| DE8282400124T DE3261786D1 (en) | 1981-01-27 | 1982-01-22 | System for testing and indicating the operating condition of a logic circuit |
| JP57009950A JPS57147072A (en) | 1981-01-27 | 1982-01-25 | System for testing and indicating action state of logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8101463A FR2498763A1 (fr) | 1981-01-27 | 1981-01-27 | Systeme de test et de visualisation d'etats de fonctionnement d'un circuit logique |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2498763A1 FR2498763A1 (fr) | 1982-07-30 |
| FR2498763B1 true FR2498763B1 (show.php) | 1983-02-18 |
Family
ID=9254545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8101463A Granted FR2498763A1 (fr) | 1981-01-27 | 1981-01-27 | Systeme de test et de visualisation d'etats de fonctionnement d'un circuit logique |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0057147B1 (show.php) |
| JP (1) | JPS57147072A (show.php) |
| DE (1) | DE3261786D1 (show.php) |
| FR (1) | FR2498763A1 (show.php) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3562644A (en) * | 1968-06-14 | 1971-02-09 | Nicholas De Wolf | Circuit tester providing circuit-selected test parameters |
| US3881260A (en) * | 1973-07-05 | 1975-05-06 | James M Hombs | Self-teaching machine for binary logic |
| US3924181A (en) * | 1973-10-16 | 1975-12-02 | Hughes Aircraft Co | Test circuitry employing a cyclic code generator |
-
1981
- 1981-01-27 FR FR8101463A patent/FR2498763A1/fr active Granted
-
1982
- 1982-01-22 DE DE8282400124T patent/DE3261786D1/de not_active Expired
- 1982-01-22 EP EP19820400124 patent/EP0057147B1/fr not_active Expired
- 1982-01-25 JP JP57009950A patent/JPS57147072A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0057147A1 (fr) | 1982-08-04 |
| EP0057147B1 (fr) | 1985-01-09 |
| JPS57147072A (en) | 1982-09-10 |
| DE3261786D1 (en) | 1985-02-21 |
| FR2498763A1 (fr) | 1982-07-30 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |