FR2490895A1 - MAINTENANCE CIRCUIT FOR OSCILLATOR WITH LOW POWER CONSUMPTION - Google Patents

Abstract

The oscillator circuit comprises an active amplifier transistor 1 which is supplied by a current source comprising a second active amplifier transistor 13 whose control electrode 13a is connected to the control electrode 1b of the first transistor by way of capacitive decoupling means 22, 23. The first and second transistors 1, 13 are of opposite conductivity types. Bias circuits 4, 14 apply to the control electrode of the second transistor a control signal 13a which contains the oscillation signal VA which is superimposed on a d.c. voltage which depends on the amplitude of the oscillation signal. This circuit can be used in particular for the time bases of electronic watches.

Description

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  MAINTENANCE CIRCUIT FOR LOW OSCILLATOR

CURRENT CONSUMPTION

  The present invention relates to a maintenance circuit for a

  resonator and, more particularly, a common maintenance circuit

  taking a first and a second active element whose paths of

  controlled current are connected in series between power terminals

  tation. This circuit is more particularly intended to be used

  to realize the time base of a quartz electronic watch.

  The oscillator circuit in CMOS technology most widespread currently in watchmaking is that which is the subject of the French patent published under number 2.110.109. In this known circuit, the active element consists of an inverter powered by a DC voltage source. A polarization resistance of sufficiently large value (greater than 10 M) is connected between

  the output and input of the inverter, in parallel with the resonator

  quartz fan. Two capacitors, one of which is variable to

  setting the oscillation frequency, are connected between

  a terminal of the supply voltage source and, respectively,

  the input and output of the inverter.

  This known oscillator circuit is very simple, but it does not

  gives no satisfactory result as regards the consumption of

  electrical current and the variability of the os-

  according to other parameters. This is due to the fact that, under normal operating conditions, the resonator and the circuit

  oscillator itself are overexcited. Indeed, the need to

  when designing the elements of the circuit, for the operating parameters, the supply voltage, the impedance of the resonator, and the load capacitance, the values corresponding to the most unfavorable conditions are visualized so that the slope of this known oscillator circuit is, in normal operating mode, too high; it results in an overexcitation. In addition, for there to trigger the oscillation, it is necessary that the two transistors of the inverter are simultaneously conductive, which requires, for this known circuit, a supply voltage greater than the sum

  threshold voltages of each transistor.

  It has already been proposed to reduce the slope of the oscillator circuit -2 by using resistors or voltage regulators. These

  However, the means remain insufficient.

  To achieve a satisfactory result, it would be necessary

  see an oscillator circuit in which the bias current D of the active element is automatically adjusted so as to obtain the lowest possible amplitude of oscillation, compatible with the control, by the oscillator, of a circuit such that an amplifier

  or a frequency divider that can be connected to it.

  An oscillator circuit of this type, described for example in Swiss Patent No. 580,358, is schematically shown in FIG. 1. This known circuit comprises a p-channel MOS transistor. 1 polarized by a resistor 2 connected between its drain la, and its gate lb so that the average potential of the grid lb is equal to that of the drain la. A current source 3 is connected in series with the drain-source path of the transistor 1, between the terminals of a supply voltage source + V, M. This current source 3 which is constituted by a channel MOS transistor n whose controlled current path is connected in series with the transistor 1 between the terminals + V, M, imposes on the transistor 1 a mean drain current of value just above the critical value for triggering the oscillation. A control circuit 4 is connected between an input terminal 5 of the oscillator and a control terminal 3a of the current source 3; this regulation circuit 4 makes it possible, by acting on the current source 3 as a function of the amplitude of the oscillation signal of the resonator 6, to stabilize the current flowing

  in the drain-source path of transistor 1.

  When transistor 1 is operating in the low invert regime

  sion, the slope of the oscillator is given by: gm = Io o Io est

  the current supplied by the source 3 and Vc is a characteristic voltage

  of transistor 1 with a typical value of 50 mV, characteristic voltage

  which remains about constant for a particular technology.

  born. As can be seen in FIG. 1, the known oscillator circuit comprises, of course, a crystal resonator 6 connected between the input terminal 5 of the oscillator and an output terminal 7; the bias resistor 2 is connected between the input and output terminals 7; the input terminal 5 is connected to the gate 1b of the transistor 1; the output terminal 7 is connected to the drain 1a of the transistor 1; the oscillator circuit also comprises two capacitors 8a and 8b each connected between the terminal M of the supply voltage source and, respectively, the input terminal 5 and the output terminal 7 of the oscillator. Such a circuit, although allowing a consumption of

  very low current, however, has the disadvantage of

  class A. It is well known that the efficiency of an ampli-

  class A is weak.

  The Swiss patent application published under the number 15.657 / 77, describes another known oscillator which has been shown in FIG. 2. In this figure, the elements identical or analogous to FIG.

  those of Figure 1 carry identical references. This oscilla-

  known carrier comprises: a p-channel MOS transistor. 9 and a transist

  N-channel MOS tor, the transistors 9 and 10 being inverter-mounted with a common bias resistor 11. A current source 3 is connected in parallel with a filter capacitor 12, between the source of the transistor 10 and the M terminal of the supply voltage source. The current source 3 sets the

  current flowing in inverter 9 to 11 to a value just sufficient

  to trigger the oscillation. This current source 3 is also controlled by a regulator 4,

  according to the amplitude of the oscillation signal of the resonator 6.

  By virtue of the capacitor 12, which bypasses any alternating component of the oscillation voltage, the supply voltage of the inverter can be considered as constant within an oscillation period. However, the supply voltage across the inverter 9 to 11 adapts in each case to a value such that the current consumption of the oscillator circuit is identical to the value of the current delivered by the source of the

current 3.

  This known circuit consumes even less current than that of Figure 1, but it has two important drawbacks: as in the case of the inverter circuit described above, the supply voltage must be greater than the sum of the threshold voltages of each transistor 9, 10; by the way, the capacitor of

  Filtering 12 occupies an important place on the integrated circuit.

  The invention has particular ob.iet purpose to achieve a circuit

  oscillator combining the advantages of the above-mentioned known circuits.

  without the disadvantages.

  According to the invention, the first and second active elements each receive on their control electrode a respective signal formed by the signal collected on the input terminal of the circuit, superimposed on a DC voltage signal varying in

  depending on the amplitude of the oscillation signal of the resonator.

  Thus the two active elements work as amplifiers and can work each in regime or class C, which provides

  a significant decrease in current consumption of the oscilla-

  tor. In addition, the first and second active elements can

  work so that when the first element is con-

  the second element is blocked, which prevents a direct flow of current through the active elements from one terminal to the other of the power supply. In addition, said DC voltage signal can be selected. for each active element, so that the current flowing through this active element, when the latter is in the conducting state, has

  the minimum value allowing the maintenance of oscillations

resonator.

  The characteristics and advantages of the oscillator circuit

  according to the invention will be better understood on reading the description of

  following example of an embodiment, description made in

  reference to the accompanying drawings in which: - Figures 1 and 2, already described, show the diagrams of the oscillator circuits according to two prior arts, - Figure 3 shows the diagram of a particular embodiment of a maintenance circuit according to FIG. 4 shows the current drain / potential difference characteristic between gate and source, of the second active element, as well as two time diagrams of the control signal.

applied to this active element.

  Just like the circuit of FIG. 1, the circuit of FIG. 3 comprises a quartz resonator 6, an input terminal 5, an output terminal 7, a first capacitor 8a, connected between the input terminal 5 and one of the terminals M of the power supply source, a second capacitor 8b connected between the output terminal 7 of the oscillator and the terminal M, a channel MOS transistor

  p. 1, whose drain is connected to the output terminal 7 of the oscillator

  and the gate Ib of which is connected to the input terminal 5 of the oscillator, a second n-channel MOS transistor 13 connected in series with the source-drain path of the first MOS transistor between the terminals + VM of the power source, and a regulator 4 receiving the oscillation signal VA present at the terminal

input 5 of the oscillator.

  However, in the circuit of FIG. 3, between the gate 13a of the second transistor 13 and the regulator 4 is interposed a

  intermediate circuit 14 responding to the signal delivered by the regula-

  4 and the VA signal on terminal 5, to provide a

  control signal 15 which contains the alternating oscillation signal

  VA, superimposed on a DC voltage whose value is

  function of the amplitude A of said oscillation signal.

  The drain 13b of the transistor 13 is connected to the drain 1a of the transistor 1, and its source 13c is connected to the terminal M of the power supply. Since the source 1c of transistor 1 is connected to the + V terminal of the power supply, the current paths controlled by transistors 1 and 13 are connected in series.

  between the + V, M terminals of this power source.

  The intermediate circuit 14 comprises: a current source 17, a third n-channel MOS transistor 18, whose drain-source path is connected in series with the current source 17, a bias resistor 19 connected between the gate 18a and the drain 18b of the transistor 18, and a filter capacitor 20 connected in parallel with the drain-source path of the transistor 18 between the junction point 21 of the resistor 19 and the drain 18b, and the terminal M of the power supply electric. The gate 18a of the transistor 18 is connected to the gate 13a of the transistor 13 and the source 18c of this transistor is connected to the terminal M. The transistors 13 and 18 are thus mounted in "mirror" so that the

  current i flowing through the transistor 13 remains at the equilibrium

  proportional to the current supplied by the current source 17.

  The grids lb and 13a of the transistors 1 and 13 are connected to the input terminal 5 of the oscillator via a

capacitor 22 respectively 23.

  The crystal resonator 6 is connected between the input terminal 5 and the output terminal 7. The control circuit 4, which receives the input signal VA present at the input terminal 5 of the oscillator, controls the current provided by the current source 17 so as to stabilize and

  to minimize the current consumed by the oscillator.

  The regulation circuit 4 shown in FIG. 3 is analogous to the amplitude regulator of the oscillator shown in FIG.

  Figure 15 on page 139 of the E.A.

  VITTOZ "Quartz Oscillator for Watches" published in the proceedings of the Tenth International Chronometry Congress, Geneva, September

1979, Volume 3, pages 131-140.

  According to this example, the regulator 4 comprises a first pair of complementary transistors 24 and 25 having a node common to the drain, connected by the sources to the corresponding terminals of the supply voltage source + VPi. The gate of the p-channel transistor 25 is connected to the drain thereof and to the gate 17a

of the transistor 17.

  The regulator 4 comprises a second pair of complementary transistors 26 and 27 also having a node common to the drain, and being connected, by the sources, to the corresponding terminals of the

  the supply voltage source + V, M.

  The gate of the n-channel transistor 24 is connected, on the one hand, to the gate of the n-channel transistor 26 via a resistor 28 and, on the other hand, to the terminal M by intermediate

a capacitor 29.

  The source of transistor 24 is connected to terminal M by means of

intermediate of resistance 30.

  The gate of the transistor 26 is connected, on the one hand, to the drain thereof via a resistor 31 and, on the other hand, to the input terminal 5, via a capacitor

32.

  Finally, the drain of transistor 26 is connected to terminal M by

  via a capacitor 33.

24 90895

  The operation of the circuit of FIG. 3 is as follows. In the absence of oscillation, the working point of the transistor 18 is given by the current delivered by the current source 17; the voltages at the drain 18b and at the gate 18a of the transistor 18 are given by the gate voltage characteristic as a function of the drain current of this transistor 18. Similarly, the working point of the transistor 1 is determined by the current i flowing in the

  the drain-source path of the transistor 13, this current being proportionally

  nel provided by the source 17.

  When the oscillation is triggered, an alternating voltage VA is superimposed on a DC voltage VC on the gate 18a of the transistor 18. As the amplitude A of the signal VA increases, because of the non-linearity of the characteristic of transistor 18, the average current flowing therethrough tends to become larger than the current supplied by the source 17, which

  causes the capacitor 20 to discharge and to cause a decrease in

  tion of the voltage across this capacitor 20; the value of this capacitor 20 is advantageously chosen such that the voltage across said capacitor remains approximately constant for each period of the AC voltage signal VA, in order to ensure that the transistor 18 is operating in saturation mode, the peak amplitude at peak of this alternating voltage VA being, for the type of oscillators referred to here, less than the voltage of

  threshold of the transistors it comprises.

  As the average value VC of the voltage of the gate 18a of

  transistor 18 must remain equal to the voltage across the terminals of the

  20, a current flows through the resistor 19 until the average current flowing in the drain-source path of the transistor 18 becomes equal to the current supplied by the source 17. The working point of the transistor 18 therefore moves according to the amplitude A of the alternating voltage VA collected on the input terminal 5 of the oscillator, as well as the value of the current supplied by the source 17. As a result, the average voltage value VC decreases as a function of the amplitude A. It is arranged, by a suitable dimensioning of the transistor 18, so that in the absence of oscillation, this average voltage has a value VCo substantially equal to the threshold voltage VT of -8-

transistor 13 (FIG. 4).

  It is shown that the mean value VlC of the voltage applied to the gate 1b of the transistor 1 is an increasing function of

  the amplitude A of the alternating voltage VA.

  By a suitable dimensioning of the transistors 1 and 13, this value VIC has, for A = O, a value

  VlCo substantially equal to the threshold voltage V'T of transistor 1.

  This last transistor 1 thus receives on its gate lb a signal of

  command 100 formed by the signal VA superimposed on a voltage signal.

  VIC continues increasing with A, from a value (for A = 0), VicO substantially equal to the threshold voltage V'T of the transistor 1. Thus, at the start of the oscillator, the transistors 1 and 13 n substantially amplify the respectively positive negative half-wave of the signal VA, while during the operation of the oscillator, the transistors 1 and 13 amplify only peaks

  negative respectively positive of the signal VA.

  In FIG. 4, the amplified signal portions have been hatched.

  by the transistor 13 whose characteristic has been shown

  I = f (V -Vs) identified by reference 34.

  The signal portions VA that the transistor I will amplify are substantially similar but of opposite polarity to that of the parts

hatched in Figure 4.

  Transistors 1 and 13 thus constitute in a manner

  push-pull stage working, under the normal conditions of

  In this way, the current does not flow simultaneously

  through transistors 1 and 13, so that it is possible to avoid

excessive summation of current.

  In operation, the current supplied by the source + V, M does not

  passes through transistor 1 only during a small part of the

  negative half-period of the signal VA, this current serving to charge the output capacitor 8b; during the positive half-cycles of the signal VA, the output capacitor 8b discharges towards the terminal

  M, through the transistor 13 in the on state.

  The maintenance circuit thus produced therefore works in class C after a brief start phase substantially in class B. By sizing transistors 1, 13 and 18, so that the average current delivered by the source 17 is approximately equal to 10% of the average current flowing in the transistor 13, the current consumption of the oscillator circuit is only slightly greater than

that of the circuit of Figure 2.

  Moreover, with respect to the circuit of FIG. 2, the added elements: transistor 18, capacitor 20, 22 and 23 and polarization resistor 19 require a much less space.

  important that the filter capacitor 12 used by the cir-

  baked in Figure 2; these added elements are furthermore fully compatible with a technology in which a circuit according to the

  Figure 1 or Figure 2 can be realized.

  The biasing resistors 2 and 19 of the transistors 1 and 18 may be constituted for example by diodes formed by lateral junctions made in the polycrystalline silicon as described in the report of E.A. VITTOZ above mentioned; alternatively, these polarization resistors can

  be constituted by networks of transistors.

  In addition, the circuit according to the invention works with a supply voltage which is slightly greater than a single threshold voltage of MOS transistor, because there is no transistor

  in series whose grids are connected continuously.

  Of course, the control means constituted by the circuits 4 and 14 could be replaced by any other circuit corresponding to the amplitude A of the oscillation signal of the resonator 6,

  as well as the signal (VA) present on the input terminal 5, in

  a control signal formed by a DC voltage signal (VC) of decreasing value as a function of said amplitude A,

superimposed on said signal (VA).

  Moreover, the invention is not limited to the circuits of

  made in CMOS technology. In particular, the two

  MOS amplifier sistors 1 and 13 could be of the same type of conduction. In this case, DC voltage signals V C and V C C both vary in decreasing or decreasing order, depending on the amplitude A, depending on whether it is

  p-channel transistors respectively n.

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Claims (6)

  Circuit for maintaining a resonator oscillation signal (6), comprising an input terminal (5), an output terminal (7), power supply terminals (+ V, M) ); a first active element (1); polarization means (2) of this active element; a second active element (13) whose controlled current path is connected, in series with that of the first active element (1), between said supply terminals (+ V, M); and an input capacitor (8a) and an output capacitor (8b), connected between a power supply terminal (M) and the input terminal respectively the output terminal, characterized by bias means responsive to the signal ( VA) present on said input terminal (5) and on the amplitude (A) of said oscillator signal of the resonator for applying to the control electrodes (Ib, 13a) of the first (1) respectively of the second element active (13) a control signal (100 or 15) which contains said input signal (VA) superimposed on a DC voltage signal (V1 or V V) varying according to the amplitude (A) of said oscillation signal.   2. Circuit according to claim 1, characterized in that said polarization means comprise: a current source (17); a third active element (18) whose controlled current path is connected in series with the current source (17), whose   the control electrode - (18a) is connected to that (13a) of the   x active element (13), and whose controlled current path electrode (18c) opposite the current source (17) is connected to the same terminal (M) of the supply voltage source that the electrode of the same name (13c) of the second active element (13), this third active element (18) being of the same type of conduction as the second active element (13); polarization means (19) of the third active element (18); and a capacitor (20) connected in   parallel with the controlled current path of said third element. active ingredient (18).   3. Circuit according to claim 2, characterized in that said biasing means comprise a regulator circuit   (4) responsive to the amplitude (A) of the oscillation signal of the resonant   tor (16) for controlling the current supplied by the power source 2490E95   (17) according to said amplitude A.   4. Circuit according to one of claims 2 and 3, characterized   in that said first and second active elements (1,13> are MOS transistors of opposite conduction types, and in that said transistors are made with the third active element (18), the current source (17) and the capacitors (8a, 8b, 20,22,23)   in the form of an integrated circuit in CMOS technology.   Circuit according to Claim 2, characterized in that   is made of grid technology made of polycrystalline silicon   strongly doped tallin, in that the polarization means of the first and / or the third active element (1 or 18 respectively) comprise a resistor (2, respectively 19) connected between the gate and the drain of said element, and in that this resistance consists of   diodes formed by lateral junctions made in silicon polycrystallineium.   6. Circuit according to claim 2, characterized in that the biasing means of the first and / or third element   active (1 or 18) include transistor arrays.