FR2487617A1 - MOTION DETECTOR CIRCUIT FOR INTERLACE TELEVISION IMAGE - Google Patents

Abstract

SIMPLIFIED MOTION DETECTOR CIRCUIT. IN A MOTION DETECTOR CIRCUIT FOR A TELEVISION SIGNAL APPLIED TO AN INPUT 3, A FRAME DELAY CIRCUIT 5 MAY BE SUFFICIENT WHEN IN MORE THAN ONE COMPARATOR CIRCUIT 15 AND ONE OUTPUT CIRCUIT 42, A CIRCUIT IS ALSO USED SIGN CHANGE DETECTOR 126 TO OBTAIN A MOTION INDICATOR SIGNAL AT AN OUTPUT 137. APPLICATION TO IMAGE NOISE REDUCTION IN TELEVISION.

Description

"MOTION DETECTOR CIRCUIT FOR AN IMAGE OF

INTERLACE TELEVISION "

  The present invention relates to a detector circuit of

  movement for an interlaced television image, in the-

  which, in a comparator circuit, information from

  of a number of successive lines is compared with the

  forming a corresponding number of successive lines, which is obtained via a delay circuit from the first piece of information, this comparator circuit comprising an output circuit for obtaining a signal

movement indicator.

  The review Radio-Diffusion-Television, April / May 1978, pages 35 to 42, describes a motion detector circuit of the aforementioned type, in which the delay circuit is an image delay circuit and in which the information of some successive lines in time is compared in the

  comparator circuit, to the information of a few lines cor-

  correspondents who succeed each other in time and who come

from a previous image.

  The object of the invention is to achieve savings in

  ponents. A motion detector circuit of the type mentioned above according to the invention is for this purpose characterized in that the delay circuit is a frame delay circuit, while the comparator circuit is designed to compare the information of a number of lines of image which succeed one another in position with the information of the lines which

  precede in position, while a detector circuit of

  The sign arrangement is coupled to the output circuit so that a motion detection signal can only occur substantially when the sign changes.

  different lines of information that succeed each other in posi-

  with the lines that precede them.

  The fact of using a sign change detector circuit makes it possible to be content with a frame delay circuit instead of an image delay circuit, which represents an appreciable saving of components and is suitable for furthermore, advantageously, in circuits in which a frame memory is used for other purposes, such as,

  for example, in interpolation circuits for

number of lines.

  An embodiment of the invention will be described below.

  after with reference to the accompanying drawing, in which:

  FIG. 1 is a block diagram of a detection circuit

  movement according to the invention, and FIG. 2 schematically illustrates the phenomenon of which

  it takes advantage in a circuit according to the invention.

  In FIG. 1, at an input 3 of a frame delay circuit 5, an interlaced television signal is applied for which, at each moment, it is necessary to determine whether, in a

  picture reproduced by means of this television signal, a

  placement of a reproduced object took place. In Figure 2,

  such an object is reproduced in the form of a white surface

  che on a dark background that takes, during the first frame of an image, the position I and during the next frame,

position II.

  The frame delay circuit 5 has an output 7 to

  which the input signal appears without delay and a

  tie 9 at which the input signal appears with a delay

  a frame time minus a half-line time (R-1 / 2L).

  In FIG. 2, in a corner of the displaced object, is represented a portion of a number of image lines, of which information B comes from a line with a sequence number n1 determined by its position in a image appears at the output 7 and information A coming from a line with an order number n determined by its position in an image

  appears at the output 9 of the delay circuit 5.

-3-

  The outputs 7 and 9 of the delay circuit 5 are respectively

  connected to inputs Il and 13 of a compar-

  which has three subtracter circuits 17, 19, 21.

  Two inputs of the subtracter circuit 17 are respectively connected to the inputs 11 and 13 of the comparator circuit 15. At an output 23 of the comparator circuit 15 connected to an output of the subtracter circuit 17, the difference appears.

  A-B information of the image lines n and n-i.

  The subtractor circuit 19 has an input which is connected directly to the input 11 of the comparator circuit

  and an input that is connected to input 13 through

  a delay line 25 with a delay of one

  line time (L). At the connection between this line of

  25 and the input of the subtracter circuit 19 appears information C from a line shown in Figure 2, having an order number n-2 determined by its position in an image. The difference B-C of the information coming from the image lines n-i and n-2 appears at an output 27 of the comparator circuit 15 connected to an output of the circuit

subtractor 19.

  The subtractor circuit 21 has an input which is connected via the delay line 25 to

  input 13 and another input that is connected, by the

  a delay line 29 with a delay

  of a line time (L) at the input 11 of the comparator circuit

  15. Information D from a line with an order number n-3 determined by its position in an image is provided, via the delay line 29, to

  the corresponding input of the subtractor circuit 21. The

  C-D of the information from the n-2 and n-3 image lines appears at an output 31 of the comparator circuit

  connected to an output of the subtractor circuit 21.

  The image lines n and n-2 in FIG.

  in the frame in which the reproduced object takes the posi-

  I and are therefore lines that represent the dark background.

  The image lines n-1 and n-3 appear in the frame in which the reproduced object occupies the position II and are -4-

  so lines that are clear in the area of the object.

  In two partial areas 33 and 35, the lines n, n1, n-2 and n-3 are therefore alternately dark, light, dark and light, which is indicated in FIG. 2 by 0, 1, 0, 1. differences AB, BC and CD at the outputs 23, 27 and 31 of the comparator circuit 15, are successively -1, +1 and -1, and therefore have in the displacement zone, as well as

  for horizontal and vertical displacements, a change in

polarity or sign.

  The outputs 23, 27 and 31 of the comparator circuit 15 are

  connected respectively to inputs 37, 39 and 41 of a circuit

  These inputs 37, 39, 41 are respectively connected to the inputs 43, 45, 47 of three limiters 49, 51, 53 and to the inputs 55, 57, 59 of three multipliers.

61, 63, 65.

  At the outputs 67, 69, 71 of the limiters 49, 51, 53 appear

  signals of sign StA-B], SrB-CJ, S [C-D] which indicate

  respectively the signs of the differences A-B, B-C, -

  CD. The sign signals at the outputs 67, 69, 71 are

  respectively to other inputs 73, 75, 77 of the multi-

  plicators 61, 63, 65, and outputs 79, 81, 83 of the circuit

output 42.

  At the outputs 85, 87, 89 of the multipliers 61, 63, 65 appear the respective absolute values [A-B],

  [B-C], [C-D], signals present at inputs 55, 57, 59.

  As shown in Figure 2 and the above description,

  these absolute values are different from zero in the area

of displacement.

  In three threshold circuits 91, 93 and 95, whose

  97, 99, 101 are respectively connected to the outputs, 87, 89 of the multipliers 61, 63, 65, it is examined whether this value deviating from zero exceeds a certain threshold value which is determined by a voltage source of

  threshold 109 connected to other inputs 103, 105, 107

  The outputs of the threshold circuits 91, 93, 95. An output 111, 113, respective threshold circuits 91, 93, 95 are connected to a corresponding input of an "AND" gate circuit 117 of which

  an output is connected to an input of another circuit-

door "AND" 119.

  The "AND" gate circuit 117 provides a "one" logic signal for the "AND" port 119 when the three threshold circuits 91, 93, 95 have measured an exceeding of the threshold value, which is the case in signals located in the

movement area.

  At the outputs 79, 81, 83 of the output circuit 42 are connected

  respectively the inputs 121, 123, 125 of a circuit

  sign change detector 126. In the detection circuit

  With the change of sign 126, the input 121 is connected to an input of an exclusive "OR" gate circuit 127, another input of which is connected to the input 123, and to an input of another gate circuit "OR" 129 exclusive of which another input is in turn connected to the input 125. The outputs of the exclusive "OR" gate circuits 127, 129 are connected to the corresponding inputs of an "AND" gate circuit 131, one of which The output is connected, via an output 133 of the sign change detector circuit 126 and an input 135 of the output circuit 42, to another input of the "AND" gate circuit 119. The output of the circuit gate "AND" 119 is connected to an output 137 of the circuit, o appears, at the place of a movement in the image, a signal which is a

"a" logical.

  Exclusive "OR" door circuits provide indeed

  a signal that is a logical "one" when at one of their

  A logic signal is applied to the signal and a logic "zero" signal to the other input. If the signals at the inputs 121, 123, 125 are in this order alternately a logical "zero", "one" and "zero", as in the motion domain for the situation sketched in FIG. Exclusive "OR" gate circuits 127, 129 and thus also the "AND" gate circuit 131 provide a "one" logic signal and because, in the traveling range, the "AND" gate circuit 117 also provides a signal logic -6-

  "one", output 137 of the output circuit becomes a "one"

  in the movement zone, so that an indi-

  motion indicator appears at exit 137.

  Since this movement indicator signal appears to be

  when moving horizontally as well as vertically in the movement zone, it is not

  it is not necessary to provide for separate detection for each

one of the two directions.

  In the embodiment shown, for each cir-

  baked thresholds 91, 93 and 95, the chosen threshold value is

  the same. It is clear that these values could potentially

be chosen different.

  Although the number of successive image lines in posi-

  tion for the detection of the movement of

  in this case of four, it is clear that a number

  minimum of three is required and that number may be

  be more than four.

  Where appropriate, the number of image points to be taken into account in the horizontal direction for the determination

  movement can also be increased. For this purpose, a cir-

  for example, can be provided at exit 137 to

  a "one" logical signal when a desired number of successive image points causes the formation of a signal

logical "one" at the exit 137.

  It is also clear that partial circuits of another structure may possibly be used, provided that the principle of the invention which is

  based on the possible application of a frame delay when

  a sign change detector circuit is used.

  As a frame delay, one can optionally choose

  also a frame time plus a half-line time (R + 1 / 2L), provided that the comparator circuit 15 is adapted so that a comparison of the information to

  from successive image lines in position either again

calf obtained.

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Claims (3)

CLAIMS -   1.- Motion detector circuit for a picture of   interlaced television, in which, in a comparable circuit,   (15), information from a number of successive lines is compared to the information of a corresponding number of successive lines, which is obtained via a delay circuit (5). ) from   of the first information, this comparator circuit   both an output circuit (42) for obtaining a motion indicating signal, characterized in that the delay circuit (5) is a frame delay circuit, while the   comparator circuit (15) is designed to compare the information   a plurality of image lines successively in position1 with the information of the lines preceding them in position, while a sign change detector circuit (126) is coupled to the output circuit (42). such that a motion detection signal can be produced practically only during the change of sign of   information differences of lines that succeed each other in po-   with the lines that precede them.   2.- motion detector circuit according to the   cation 1, characterized in that the delay circuit of   frame (5) has a delay of one frame time minus one half line time.   3. Motion detector circuit according to the   cation 1 or 2, characterized in that the detector circuit   sign change (126) has at least one circuit   gate (127) having an exclusive "OR" function.