FR2486291B1 - - Google Patents
Info
- Publication number
- FR2486291B1 FR2486291B1 FR8014929A FR8014929A FR2486291B1 FR 2486291 B1 FR2486291 B1 FR 2486291B1 FR 8014929 A FR8014929 A FR 8014929A FR 8014929 A FR8014929 A FR 8014929A FR 2486291 B1 FR2486291 B1 FR 2486291B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/31—Providing disk cache in a specific location of a storage system
- G06F2212/312—In storage controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8014929A FR2486291A1 (fr) | 1980-07-04 | 1980-07-04 | Systeme memoire intercalaire entre calculateur et memoire auxiliaire |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8014929A FR2486291A1 (fr) | 1980-07-04 | 1980-07-04 | Systeme memoire intercalaire entre calculateur et memoire auxiliaire |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2486291A1 FR2486291A1 (fr) | 1982-01-08 |
FR2486291B1 true FR2486291B1 (fr) | 1985-03-08 |
Family
ID=9243869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8014929A Granted FR2486291A1 (fr) | 1980-07-04 | 1980-07-04 | Systeme memoire intercalaire entre calculateur et memoire auxiliaire |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2486291A1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2656441B1 (fr) * | 1989-12-22 | 1993-12-10 | Bull Sa | Procede securise d'ecriture rapide d'informations pour dispositif de memoire de masse. |
FR2662523B1 (fr) * | 1990-05-28 | 1994-08-12 | Copernique | Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique. |
JP2864741B2 (ja) * | 1990-12-19 | 1999-03-08 | 株式会社日立製作所 | データインテグリティを保証する通信システム |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4399503A (en) * | 1978-06-30 | 1983-08-16 | Bunker Ramo Corporation | Dynamic disk buffer control unit |
-
1980
- 1980-07-04 FR FR8014929A patent/FR2486291A1/fr active Granted
Also Published As
Publication number | Publication date |
---|---|
FR2486291A1 (fr) | 1982-01-08 |