FR2484140A1 - METHOD FOR MANUFACTURING A COMPOSITE DEVICE, OF THE METAL-OXIDE-SEMICONDUCTOR TYPE, CONTROL ELECTRODE WITH LOW SUPERFICIAL RESISTIVITY, AND DEVICE OBTAINED - Google Patents

Abstract

METHOD OF MANUFACTURING A COMPOSITE DEVICE, OF THE METAL-OXIDE-SEMICONDUCTOR TYPE, OF A LOW SURFICIAL RESISTIVITY CONTROL ELECTRODE, AND THE DEVICE OBTAINED. ON SUBSTRATE OF SI, A THIN INSULATING LAYER 10 IS FORMED ON WHICH A FIRST LAYER 14 OF POLYCRYSTALLINE SILICON IS DEPOSED, THEN A LAYER OF AN ELECTRICALLY CONDUCTIVE MATERIAL 16; METAL OR ALLOY THAT MAY REACT WITH IF, BY HEATING, TO FORM A CONDUCTIVE SILICIDE, THEN A SECOND LAYER 18 OF POLYCRYSTALLINE SILICON. A DIFFUSION OF SI IN 16, AND CLASSIC PHOTOLITHOGRAPHY, ATTACK AND OXIDATION OPERATIONS GIVE A CONTROL ELECTRODE. APPLICATION TO THE REALIZATION OF INTEGRATED CIRCUITS WITH VARIOUS MEMORIES.

Description

The present invention relates in a

  MOS devices (metal / oxide / semis)

  conductor) and, more particularly, devices

  from MOS type to control electrode or silicon gate.

  MOS type devices with door in

  silicon, in which a polycrystalline silicon layer

  doped tallin, or "polysilicon", serves as a control electrode, are widely used in very diverse integrated circuits of the MOS type, such as read-only memories or RAMs. The speed of silicon-gate MOS type devices has so far been

  limited, in particular by the relative surface resistivity

  strong polycrystalline silicon, which is typically

  from 15 to 40 ohms per square. Since the operating speed of an MOS circuit depends on the RC (resistance-capacitance) time constants within the circuit, the relatively high level of surface resistivity of conventional silicon gate devices limits circuit operating speed.

  embedded that contain these devices.

  The semiconductor industry has since admitted

  long interest in reducing the resistance

  the surface speed of silicon gate MOS devices to increase its operating speed, but a practical and successful way to decrease surface resistivity, which decreases

  RC time constant and increases the speed of

  has not been obtained so far.

  In an attempt to reduce the surface resistivity of the material used for the control electrode or gate in MOS devices, it has been envisaged to use refractory metals or silicides of refractory metals such as molybdenum, titanium disilicide, disilicide of tantalum, and of molybdenum disilicide as matter in the structures

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  doors of integrated circuits of the MOS type. Reports

  on these studies were presented, for example by A.T.

  Sinha et al. In April 1980 at the IEEE (Institute of Electrical and Electronic Engineers) Symposium on the Physics of Reliability in a thesis entitled "Generic MOS Reliability of the High Conductivity TaSi2 / n + Poly-Si Gate Structure" / General Reliability of the high-conductivity structure TaSi2 / n + polycrystalline silicon gate / and, at the December 1979 IEEE International Meeting on Electronic Devices, SP Murarka presented

  a memoir entitled "Refractory Silicides for Low Resis-

  tivity Gates and Interconnects "/ Refractory silicides

  for low-resistivity doors and intercon-

  nexions7. The use of the materials proposed in these reports in MOS devices

  reduction of the surface resistivity, in comparison

  of a highly doped polycrystalline silicon, but these materials are often difficult to deposit and attack precisely and, by introducing

  additional harmful mechanisms, such as

  In MOS integrated circuits whose control electrode structure includes such materials, they often cause a degradation of the characteristics of the MOS integrated circuits.

  these integrated circuits and devices.

  The invention therefore aims to propose a

  MOS device with control electrode or silicone door

  cium, able to operate at higher speeds

  than those possible so far.

  The invention also aims at providing a MOS structure of the type described and which can be manufactured without requiring additional photolithographic operations. It is another object of the invention to provide an improved conductive gate material which can be formed by deposition and etching techniques, the characteristics of which are known and understood from

MOS technology engineers.

  The aim of the invention is generally to propose a MOS structure presenting the advantages of conventional silicon door technology while ensuring a significant reduction in surface resistivity and a simultaneous increase in speed.

  of these devices.

  According to the invention, a conductive layer of a metal or metal alloy is interposed or "sandwiched" between two layers to form a

  composite electrode for controlling or

  MOS. When the material of this intermediate layer

  The diary is a metal, the composite or "sandwich" is heated so that the metal of the intermediate layer reacts with the overlying and underlying polycrystalline silicon layers to form a silicide of the metal. The control electrode structure made of

  this way, in which a silicide of conductive metal

  is interposed between two layers of polycrystalline silicon, has a surface resistivity

markedly reduced.

  To achieve the above goals and to

  Still further, the invention provides a silicon control electrode MOS transistor and a method for producing it. According to its essential characteristics, the MOS transistor of the invention comprises a substrate on the surface of which are formed spaced regions of source and drain. Between these regions extends an oxide layer which coats the surface of the substrate and which is

  surmounted by a control electrode structure comprising

  a first layer of doped polycrystalline silicon overlying the oxide layer, a conductive layer

  electricity that overcomes this first layer of silicon

  polycrystalline metal with which it is in contact and a second polycrystalline silicon layer

  the conductive layer with which it is in contact.

  The conductive layer is formed of a silicide of a metal selected from titanium, tantalum, tungsten,

platinum and molybdenum.

  To manufacture such a device or to

  tor MOS, the invention provides a method according to which a thin insulating layer is formed on the surface of a substrate and then deposited on this insulating layer a first polycrystalline silicon layer, on which is deposited a conductive layer, electricity, a material capable of reacting with polycrystalline silicon by heating at an elevated temperature to form a conductive silicide; a second layer of polycrystalline silicon is deposited on this conductive layer, and this structure is then heated to cause the polycrystalline silicon of the first and second polycrystalline silicon layers to react with the material of the conductive layer in order to form a silicide of the material of this conductive layer. The process further comprises oxidizing this substrate to form a thick oxide layer

  surrounding the conductive layer and the first and second

  conde layers of polycrystalline silicon.

  According to a variant, the process of the invention

  tion consists in forming on a silicon substrate a

  thin layer of oxide, to be deposited on this layer of oxide-

  a first layer of doped polycrystalline silicon; depositing on said first layer a conductive layer; to deposit on the conductive layer a second layer

  doped polycrystalline silicon; and to withdraw selectively

  components of the oxide layer, the conductive layer and the first and second polycrystalline silicon layers to form a

  three-layer composite door or electrode

  in which the conductive layer is interposed

  between the first and second layers of polysilicon

  lens. The conductive layer is formed of a metal silicide. When this conductive layer is formed of a metal, the method comprises the additional step of heating the structure of the gate or control electrode in an inert environment to cause the reaction of this metal with the polysilicon of the first and second polycrystalline silicon layers to form a silicide of

  this metal. The method also includes the step of

  both to oxidize the substrate to form a thick oxide layer that surrounds the conductive layer and the first

  and second layers of polycrystalline silicon.

  In both embodiments of the process of the invention, the metal of the conductive layer is selected from titanium, tantalum, tungsten,

platinum and molybdenum.

  Non-limiting examples of the invention will now be described in more detail with reference to the accompanying drawing in which FIG. 1 is a cross-section of an M4OS device during an intermediate stage of its manufacture according to the present invention, FIG. the MOS device of Figure 1 at a later stage of its manufacture; and FIG. 3 is a sectional view of the device

  a later stage of its manufacture.

  Figure 1 shows a MOS device

  after the completion of an early stage of its manufacture.

  It shows a thin insulating layer 10 (typically of a thickness of 1000 A) of silicon dioxide formed in a conventional manner on a substrate 12 made of silicon,

  shown here for illustrative purposes as having a

  type of activity p. A layer 14 of polycrystalline silicon

  heavily doped is deposited on the thin layer of oxide.

  The thickness of this layer 14 is typically between

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O O

  500 A and 2500 A and silicon is typically doped with n-type impurities such as arsenic or antimony. Then, a thin layer 16, the thickness of which is advantageously between 500 A and 1500 A, of a metal such as titanium, tantalum, tungsten, platinum or molybdenum is deposited on the polycrystalline silicon layer 14 . The material chosen to serve as layer 16 is preferably a metal having the property of being able to combine at high temperatures with

  polycrystalline silicon to form a conductive silicide

  tor. The material of the layer 16 may also be an alloy or a compound of a metal, such as titanium disilicide, having comparable characteristics, but which requires no further reaction with the

  polycrystalline silicon to form the silicide of the metal.

  In the embodiment of the invention described herein, the material of the layer 16 is titanium which can be deposited on the polycrystalline silicon layer 14 by

  evaporation using an electron beam.

  Immediately after the deposition of the layer

  16 made of titanium, a second polycrystalline silicon layer 18

  tallin, which can be doped with an n-type impurity such as arsenic, antimony or phosphorus, is deposited on the titanium layer 16, in a conventional manner, until a thickness of the order of 2000 A, after which a layer 20 of silicon nitride masking, a thickness of about 1500 A, is deposited on the

  polycrystalline silicon layer by applying

  deposits with a plasma at temperatures

less than 5000C.

  After the deposition of the nitride layer 20,

  a layer of photographic resist material (not shown

  felt) is deposited on the multilayered structure and is then exposed and developed, using conventional photolithography techniques, to obtain a desired pattern. Then, using the photographic resist thus treated as a mask, the underlying layer 20 of silicon nitride is attacked by conventional etching or stripping techniques in the presence of a plasma, and then the remainder is removed. of the photographic reserve material. Then; using the treated nitride layer as a mask

  of silicon, the underlying layers are removed by etching.

  polycrystalline silicon, titanium, polycrystalline silicon and silicon dioxide, one or more at a time, using conventional techniques of etching, plasma etching or ion beam treatment, down to the silicon substrate 12. The structure obtained as a result of these steps is shown in FIG. 1. When using ion beam treatment techniques, it may be desirable to subject the structure to elevated temperatures (which can cause silicide formation). ) before putting

  the ion beam treatment operations.

  The structure shown in FIG. 1 is then subjected to a diffusion operation or

  in which the multilayer structure

  Figure 1 plays the role of a mask for

  obtaining an automatic control electrode structure

  aligned with formation on the upper surface of the substrate 12 of spaced regions 22 and 24 of source and

  drain type n +, as shown in Figure 2.

  During, or before, this operation, the structure is typically exposed to temperatures exceeding 7000C in an inert ambient, such as dry nitrogen, for a time sufficient to allow the metal of the intermediate layer 16, in this case titanium to react with the polycrystalline silicon material directly above and below the layer 16 to form a silicide of the metal, in this case, the

  disilicide of titanium 26 (Figure 3).

  If a starting material for titanium disilicide layer 16 or another disilicide or conductive metal alloy is used as the starting material, there will be no significant additional reaction between this material and the polycrystalline silicon layers, although the structure resultant is comparable to

  that it will understand the conductive silicide layer

  covering a polycrystalline silicon layer and

  covered by a polycrystalline silicon layer.

  In the resulting "sandwich" control electrode, the titanium disilicide layer 26 is advantageous in that it behaves similarly to a refractory metal, is highly conductive and oxidizes at a comparable rate. the

polycrystalline silicon.

  The structure of FIG. 2 is then subjected to a local oxidation operation in which the silicon nitride layer 20 serves as a mask. In this operation, the silicon substrate 12 is oxidized to form a thick oxide layer 28, having a thickness of the order of 10,000 A, which extends below the composite electrode. control or conductive door and surrounds this composite electrode. The side walls of the conductive composite material are also oxidized

during this operation.

  The layer 20 of silicon nitride is then removed, giving the structure shown in FIG. 3. This structure comprises a three-layer composite control electrode formed of two

  layers of polycrystalline silicon and the

  mediator of titanium disilicide. Preferably, additional diffusion can then be performed in the exposed upper surface (polysilicon)

  of the composite layer, and an additional oxidation step

  may be made on the upper surface of the polycrystalline silicon layer, in order to obtain a

  thin oxide layer (not shown) ensuring the isolation

  electrically between the polycrystalline silicon layer and an overlying metal interconnection layer subsequently formed (and also not shown). Alternatively, a similar but thicker oxide layer may

  to be chemically deposited in order to ensure this role of isolation

  electricity. The resulting MOS structure is then

  completed according to conventional manufacturing techniques.

  The MOS device built according to the present

  the invention, as described in the above embodiment, constitutes a control composite electrode

  low surface resistivity which is equivalent to

  The control composite electrode according to the invention comprises a highly conductive layer of metal silicide sandwiched between polycrystalline silicon layers. However, it differs from the conventional silicon control electrode MOS device in that it exhibits a remarkably low value of surface resistivity, of the order of 0.5 to 5.0 ohms per square, compared with conventional structures. Silicon control electrode

  doped polycrystalline in which the surface resistivity

  of doped polycrystalline silicon is typically

  between 15 and 40 ohms per square. The reduction in surface resistivity obtained in the MOS device of the present invention greatly improves the speed of

  this MOS device which can thus be used very advantage-

  many applications of such MOS devices, such as RAMs, where the speed of operation is important

special.

  In addition, the insulation-door interface

  control between the first polycrystalline silicon layer 14

  and the oxide layer 10 is a polycrystalline silicon / SiO 2 interface, and all contacts made with the conductive control gate or electrode will be made with the top layer 18 of

  polycrystalline silicon. Since the engineer in technology

  MOS is well aware of the characteristics of the polycrystalline silicon / SiO2 gate / insulator interface and those of the aluminum connections with the polycrystalline silicon overlying layer, the device manufacturer and MOS transistors can easily use the electrode structure control system according to the invention without it being necessary to transmit or present

additional considerations.

  The invention has been specifically described in the case of an example in which the titanium served as a starting material for the conductive layer interposed between the two polycrystalline silicon layers. However, it is also possible to use other metals and alloys which meet the stated specifications, as indicated above, for this material. It goes without saying that without

  out of the scope of the invention, many modifications

  can be made to the MOS transistor and its

  manufacturing process, described and shown.

Claims (9)

  1. A method for manufacturing a device of the metal / oxide / semiconductor (MOS) type, characterized in that it comprises the steps of forming on the surface of a substrate a thin insulating layer, to deposit on this layer a first layer of silicon-polycrystalline then, on this first layer, to deposit a layer, conductive of electricity and constituted   of a material that can react, by heating at a temperature   high polarity with the polycrystalline silicon to form a conductive silicide, to deposit on said conductive layer a second polycrystalline silicon layer and then to heat the structure thus obtained to cause the reaction of the polycrystalline silicon of the first and second polycrystalline silicon layers with the material of the conductive layer to form a silicide of the   material of this conductive layer.   2. Process for manufacturing a device of the metal / oxide / semiconductor (MOS) type, characterized in that it comprises the steps of forming on a silicon substrate a thin oxide layer, to be deposited.   on this layer a first polycrystalline silicon layer   doped tallin, depositing on said first silicon layer a conductive layer, depositing on the conductive layer a second layer of doped polycrystalline silicon, and selectively removing portions of said oxide layer, the conductive layer and the first and second layers of polycrystalline silicon, to form a composite structure with three layers of door   or control electrode in which the conductive layer   trice is interposed between the first and second layers of polycrystalline silicon.   3. Method according to one of the claims   1 and 2, characterized in that the conductive layer is formed of a metal.   4. Process according to claims 2 and 4   3 taken together, characterized in that it comprises the further step of heating the control electrode structure in an inert ambient medium to cause the metal of the conductive layer to react with the polycrystalline silicon of the first and second layers. polycrystalline silicon to form a silicide of this metal.   5. Method according to one of the claims   3 and 4, characterized in thatthe metal of the conductive layer is selected from titanium, tantalum,   tungsten, platinum and molybdenum.   6. Method according to claim 2, characterized in that the conductive layer is formed of a metal silicide.   7. Method according to one of the claims   1 and 2, characterized in that it comprises the additional step   of oxidizing the substrate to form a thick layer of okyde which surrounds the conductive layer   and the first and second polycrystalline silicon layers   Tallin. A metal-oxide-semiconductor (MOS) transistor device comprising a substrate (12), on the surface of which spaced source and drain regions (22, 24) are formed between which a layer ( 28) of oxide surmounting the surface (12) of the substrate, and a control electrode structure overlying said oxide layer (28), the device being characterized in that the structure of the control electrode comprises a first layer (14) of doped polycrystalline silicon surmounting the oxide layer (28) and which is surmounted by an electrically conductive layer (26) which is   contact of the first layer (14) of polycrystalline silicon   tallin, and a second layer (18) of polycrystalline silicon which covers the conductive layer (26) with which she is in contact.   9. Metal-Oxide Transistor Device   semiconductor (MOS) according to claim 8, characterized in that the conductive layer (26) is formed of a silicide of a metal selected from titanium, tantalum,   tungsten, platinum and molybdenum.