FR2473815A1 - Perfectionnement a un circuit logique mos dynamique realise en technique d'entrelacement - Google Patents
Perfectionnement a un circuit logique mos dynamique realise en technique d'entrelacement Download PDFInfo
- Publication number
- FR2473815A1 FR2473815A1 FR8100794A FR8100794A FR2473815A1 FR 2473815 A1 FR2473815 A1 FR 2473815A1 FR 8100794 A FR8100794 A FR 8100794A FR 8100794 A FR8100794 A FR 8100794A FR 2473815 A1 FR2473815 A1 FR 2473815A1
- Authority
- FR
- France
- Prior art keywords
- circuit
- point
- transistors
- technique
- junction point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 5
- 230000005669 field effect Effects 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 claims description 2
- ZPOLOEWJWXZUSP-WAYWQWQTSA-N bis(prop-2-enyl) (z)-but-2-enedioate Chemical compound C=CCOC(=O)\C=C/C(=O)OCC=C ZPOLOEWJWXZUSP-WAYWQWQTSA-N 0.000 abstract 2
- 238000005070 sampling Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000002051 biphasic effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19803001389 DE3001389A1 (de) | 1980-01-16 | 1980-01-16 | Schaltungsanordnung in integrierter schaltungstechnik mit feldeffekttransistoren |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2473815A1 true FR2473815A1 (fr) | 1981-07-17 |
| FR2473815B1 FR2473815B1 (US20070167544A1-20070719-C00007.png) | 1984-04-27 |
Family
ID=6092176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8100794A Granted FR2473815A1 (fr) | 1980-01-16 | 1981-01-16 | Perfectionnement a un circuit logique mos dynamique realise en technique d'entrelacement |
Country Status (9)
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3047222A1 (de) * | 1980-12-15 | 1982-07-15 | Naamloze Vennootschap Philips' Gloeilampenfabrieken, 5621 Eindhoven | Verknuepfungsschaltung in 2-phasen-mos-technik |
| US4496851A (en) * | 1982-03-01 | 1985-01-29 | Texas Instruments Incorporated | Dynamic metal oxide semiconductor field effect transistor clocking circuit |
| GB2120029B (en) * | 1982-05-12 | 1985-10-23 | Philips Electronic Associated | Dynamic two-phase circuit arrangement |
| CA1257343A (en) * | 1986-07-02 | 1989-07-11 | Robert C. Rose | Self-timed programmable logic array with pre-charge circuit |
| US5208489A (en) * | 1986-09-03 | 1993-05-04 | Texas Instruments Incorporated | Multiple compound domino logic circuit |
| US5015882A (en) * | 1986-09-03 | 1991-05-14 | Texas Instruments Incorporated | Compound domino CMOS circuit |
| JPS63228494A (ja) * | 1987-03-18 | 1988-09-22 | Fujitsu Ltd | ダイナミツク型デコ−ダ回路 |
| JPS6482819A (en) * | 1987-09-25 | 1989-03-28 | Toshiba Corp | Programmable logic array |
| US4851714A (en) * | 1987-12-11 | 1989-07-25 | American Telephone And Telgraph Company, At&T Bell Laboratories | Multiple output field effect transistor logic |
| US5262687A (en) * | 1992-03-09 | 1993-11-16 | Zilog, Inc. | Decoder circuit with bypass circuitry and reduced input capacitance for greater speed |
| US6201425B1 (en) | 1999-01-25 | 2001-03-13 | International Business Machines Corporation | Method and apparatus for reducing charge sharing and the bipolar effect in stacked SOI circuits |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3573487A (en) * | 1969-03-05 | 1971-04-06 | North American Rockwell | High speed multiphase gate |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS48101846A (US20070167544A1-20070719-C00007.png) * | 1972-04-03 | 1973-12-21 | ||
| JPS4942414A (US20070167544A1-20070719-C00007.png) * | 1972-08-28 | 1974-04-22 | ||
| JPS568666B2 (US20070167544A1-20070719-C00007.png) * | 1974-06-26 | 1981-02-25 | ||
| US3982138A (en) * | 1974-10-09 | 1976-09-21 | Rockwell International Corporation | High speed-low cost, clock controlled CMOS logic implementation |
| US4107548A (en) * | 1976-03-05 | 1978-08-15 | Hitachi, Ltd. | Ratioless type MIS logic circuit |
| US4123669A (en) * | 1977-09-08 | 1978-10-31 | International Business Machines Corporation | Logical OR circuit for programmed logic arrays |
-
1980
- 1980-01-16 DE DE19803001389 patent/DE3001389A1/de not_active Withdrawn
-
1981
- 1981-01-08 US US06/223,198 patent/US4415819A/en not_active Expired - Fee Related
- 1981-01-12 GB GB8100819A patent/GB2069271B/en not_active Expired
- 1981-01-13 JP JP370981A patent/JPS56106428A/ja active Pending
- 1981-01-13 IT IT19107/81A patent/IT1135013B/it active
- 1981-01-14 AU AU66196/81A patent/AU538856B2/en not_active Ceased
- 1981-01-16 FR FR8100794A patent/FR2473815A1/fr active Granted
-
1984
- 1984-06-09 SG SG424/84A patent/SG42484G/en unknown
- 1984-10-04 HK HK753/84A patent/HK75384A/xx unknown
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3573487A (en) * | 1969-03-05 | 1971-04-06 | North American Rockwell | High speed multiphase gate |
Also Published As
| Publication number | Publication date |
|---|---|
| SG42484G (en) | 1985-02-08 |
| FR2473815B1 (US20070167544A1-20070719-C00007.png) | 1984-04-27 |
| IT8119107A0 (it) | 1981-01-13 |
| AU6619681A (en) | 1982-04-22 |
| DE3001389A1 (de) | 1981-07-23 |
| HK75384A (en) | 1984-10-12 |
| AU538856B2 (en) | 1984-08-30 |
| IT1135013B (it) | 1986-08-20 |
| JPS56106428A (en) | 1981-08-24 |
| GB2069271A (en) | 1981-08-19 |
| GB2069271B (en) | 1984-02-22 |
| US4415819A (en) | 1983-11-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |