FR2468185B1 - - Google Patents

Info

Publication number
FR2468185B1
FR2468185B1 FR8022291A FR8022291A FR2468185B1 FR 2468185 B1 FR2468185 B1 FR 2468185B1 FR 8022291 A FR8022291 A FR 8022291A FR 8022291 A FR8022291 A FR 8022291A FR 2468185 B1 FR2468185 B1 FR 2468185B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8022291A
Other languages
French (fr)
Other versions
FR2468185A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to FR8022291A priority Critical patent/FR2468185A1/fr
Publication of FR2468185A1 publication Critical patent/FR2468185A1/fr
Application granted granted Critical
Publication of FR2468185B1 publication Critical patent/FR2468185B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
FR8022291A 1980-10-17 1980-10-17 Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite Granted FR2468185A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8022291A FR2468185A1 (fr) 1980-10-17 1980-10-17 Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8022291A FR2468185A1 (fr) 1980-10-17 1980-10-17 Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite

Publications (2)

Publication Number Publication Date
FR2468185A1 FR2468185A1 (fr) 1981-04-30
FR2468185B1 true FR2468185B1 (ref) 1984-12-14

Family

ID=9247046

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8022291A Granted FR2468185A1 (fr) 1980-10-17 1980-10-17 Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite

Country Status (1)

Country Link
FR (1) FR2468185A1 (ref)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1218344B (it) * 1983-03-31 1990-04-12 Ates Componenti Elettron Processo per l'autoallineamento di un doppio strato di silicio policristallino,in un dispositivo a circuito integrato,mediante un' operazione di ossidazione
JPS60134478A (ja) * 1983-11-28 1985-07-17 ローム・コーポレーション 電気的プログラム式記憶装置を製造する方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3984822A (en) * 1974-12-30 1976-10-05 Intel Corporation Double polycrystalline silicon gate memory device
GB1540450A (en) * 1975-10-29 1979-02-14 Intel Corp Self-aligning double polycrystalline silicon etching process
JPS53108247A (en) * 1976-12-27 1978-09-20 Texas Instruments Inc Electrically programmable floating gate semiconductor memory
US4151021A (en) * 1977-01-26 1979-04-24 Texas Instruments Incorporated Method of making a high density floating gate electrically programmable ROM
US4173766A (en) * 1977-09-16 1979-11-06 Fairchild Camera And Instrument Corporation Insulated gate field-effect transistor read-only memory cell
US4173791A (en) * 1977-09-16 1979-11-06 Fairchild Camera And Instrument Corporation Insulated gate field-effect transistor read-only memory array

Also Published As

Publication number Publication date
FR2468185A1 (fr) 1981-04-30

Similar Documents

Publication Publication Date Title
FR2480552B1 (ref)
FR2483338B1 (ref)
FR2474274B1 (ref)
FR2480090B1 (ref)
FR2477055B1 (ref)
GR75207B (ref)
FR2473422B1 (ref)
FR2477912B1 (ref)
FR2477413B1 (ref)
FR2476937B1 (ref)
FR2478750B1 (ref)
FR2480315B1 (ref)
FR2474301B3 (ref)
FR2478436B3 (ref)
FR2475303B1 (ref)
FR2478412B1 (ref)
FR2479701B1 (ref)
FR2477255B1 (ref)
CH641627GA3 (ref)
FR2480618B1 (ref)
FR2478240B1 (ref)
FR2473094B3 (ref)
FR2477729B1 (ref)
FR2474050B1 (ref)
FR2476261B3 (ref)

Legal Events

Date Code Title Description
ST Notification of lapse