FR2456974A1 - Systeme de traitement de donnees - Google Patents

Systeme de traitement de donnees

Info

Publication number
FR2456974A1
FR2456974A1 FR8001953A FR8001953A FR2456974A1 FR 2456974 A1 FR2456974 A1 FR 2456974A1 FR 8001953 A FR8001953 A FR 8001953A FR 8001953 A FR8001953 A FR 8001953A FR 2456974 A1 FR2456974 A1 FR 2456974A1
Authority
FR
France
Prior art keywords
units
data processing
buses
common
processing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8001953A
Other languages
English (en)
Other versions
FR2456974B1 (fr
Inventor
John J Bradley
Ming T Miu
Jian-Kuo Shen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2456974A1 publication Critical patent/FR2456974A1/fr
Application granted granted Critical
Publication of FR2456974B1 publication Critical patent/FR2456974B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

L'INVENTION CONCERNE UN SYSTEME DE TRAITEMENT DE DONNEES ET NOTAMMENT UN SYSTEME COMPRENANT PLUSIEURS BUS COMMUNS A PLUSIEURS UNITES DE TRAITEMENT DE DONNEES. L'UNITE CENTRALE CPU 200 ALLOUE CES BUS A L'UNE DES UNITES, EN REPONSE A L'UNE DES DEMANDES RECUES DES UNITES DESIRANT UTILISER LES BUS COMMUNS. LES DEMANDES DE BUS SONT GENEREES DE MANIERE SYNCHRONE PAR L'UTILISATION D'UN SIGNAL DE SYNCHRONISATION PROVENANT DE L'UNITE CENTRALE 200, QUI EST CONNECTEE EN SERIE ENTRE UNE OU PLUSIEURS UNITES SUR CHACUN DES BUS COMMUNS. APPLICATION AUX TRANSFERTS D'INFORMATION ENTRE UNE UNITE CENTRALE DES MEMOIRES ET DES APPAREILS PERIPHERIQUES.
FR808001953A 1979-01-31 1980-01-30 Systeme de traitement de donnees Expired FR2456974B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/008,004 US4300194A (en) 1979-01-31 1979-01-31 Data processing system having multiple common buses

Publications (2)

Publication Number Publication Date
FR2456974A1 true FR2456974A1 (fr) 1980-12-12
FR2456974B1 FR2456974B1 (fr) 1989-05-12

Family

ID=21729285

Family Applications (1)

Application Number Title Priority Date Filing Date
FR808001953A Expired FR2456974B1 (fr) 1979-01-31 1980-01-30 Systeme de traitement de donnees

Country Status (6)

Country Link
US (1) US4300194A (fr)
JP (1) JPS6030984B2 (fr)
AU (1) AU540401B2 (fr)
BE (1) BE881410A (fr)
CA (1) CA1153079A (fr)
FR (1) FR2456974B1 (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6043546B2 (ja) * 1980-06-27 1985-09-28 富士電機株式会社 デ−タ転送異常処理方式
US4456965A (en) * 1980-10-14 1984-06-26 Texas Instruments Incorporated Data processing system having multiple buses
US4535448A (en) * 1982-12-10 1985-08-13 At&T Bell Laboratories Dual bus communication system
FR2538140B1 (fr) * 1982-12-21 1988-06-24 Thomson Csf Mat Tel Dispositif de couplage de bus pour systeme de traitement de donnees a bus multiples
US4615017A (en) * 1983-09-19 1986-09-30 International Business Machines Corporation Memory controller with synchronous or asynchronous interface
US4622630A (en) * 1983-10-28 1986-11-11 Data General Corporation Data processing system having unique bus control protocol
US4821174A (en) * 1984-03-20 1989-04-11 Westinghouse Electric Corp. Signal processing system including a bus control module
US4785394A (en) * 1986-09-19 1988-11-15 Datapoint Corporation Fair arbitration technique for a split transaction bus in a multiprocessor computer system
US4878166A (en) * 1987-12-15 1989-10-31 Advanced Micro Devices, Inc. Direct memory access apparatus and methods for transferring data between buses having different performance characteristics
EP0357075A3 (fr) * 1988-09-02 1991-12-11 Fujitsu Limited Dispositif de commande de données et système utilisant le dispositif
US5404137A (en) * 1991-05-09 1995-04-04 Levien; Raphael L. High speed transition signalling communication system
US5509127A (en) * 1992-12-04 1996-04-16 Unisys Corporation Transmission logic apparatus for dual bus network
JP3264465B2 (ja) * 1993-06-30 2002-03-11 株式会社日立製作所 記憶システム
US6151643A (en) 1996-06-07 2000-11-21 Networks Associates, Inc. Automatic updating of diverse software products on multiple client computer systems by downloading scanning application to client computer and generating software list on client computer
US11811420B2 (en) * 2022-01-21 2023-11-07 Texas Instruments Incorporated Digital-to-analog converter with cascaded least significant bit (LSB) interpolator circuit

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810114A (en) * 1971-12-29 1974-05-07 Tokyo Shibaura Electric Co Data processing system
US3959775A (en) * 1974-08-05 1976-05-25 Gte Automatic Electric Laboratories Incorporated Multiprocessing system implemented with microprocessors
US3999163A (en) * 1974-01-10 1976-12-21 Digital Equipment Corporation Secondary storage facility for data processing systems
US4001784A (en) * 1973-12-27 1977-01-04 Honeywell Information Systems Italia Data processing system having a plurality of input/output channels and physical resources dedicated to distinct and interruptible service levels
US4120029A (en) * 1976-12-27 1978-10-10 Honeywell Information Systems, Inc. Method and apparatus for recovering a signal transferred over a common bus in a data processing system

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
US3447135A (en) * 1966-08-18 1969-05-27 Ibm Peripheral data exchange
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3832692A (en) * 1972-06-27 1974-08-27 Honeywell Inf Systems Priority network for devices coupled by a multi-line bus
US3909790A (en) * 1972-08-25 1975-09-30 Omnus Computer Corp Minicomputer with selector channel input-output system and interrupt system
US4016541A (en) * 1972-10-10 1977-04-05 Digital Equipment Corporation Memory unit for connection to central processor unit and interconnecting bus
US3886524A (en) * 1973-10-18 1975-05-27 Texas Instruments Inc Asynchronous communication bus
US3932841A (en) * 1973-10-26 1976-01-13 Raytheon Company Bus controller for digital computer system
GB1474385A (en) * 1973-12-14 1977-05-25 Int Computers Ltd Multiprocessor data processing systems
US3996561A (en) * 1974-04-23 1976-12-07 Honeywell Information Systems, Inc. Priority determination apparatus for serially coupled peripheral interfaces in a data processing system
FR2273317B1 (fr) * 1974-05-28 1976-10-15 Philips Electrologica
US4028663A (en) * 1974-06-05 1977-06-07 Bell Telephone Laboratories, Incorporated Digital computer arrangement for high speed memory access
US3931613A (en) * 1974-09-25 1976-01-06 Data General Corporation Data processing system
US3993981A (en) * 1975-06-30 1976-11-23 Honeywell Information Systems, Inc. Apparatus for processing data transfer requests in a data processing system
US3997896A (en) * 1975-06-30 1976-12-14 Honeywell Information Systems, Inc. Data processing system providing split bus cycle operation
US4001790A (en) * 1975-06-30 1977-01-04 Honeywell Information Systems, Inc. Modularly addressable units coupled in a data processing system over a common bus
US4030075A (en) * 1975-06-30 1977-06-14 Honeywell Information Systems, Inc. Data processing system having distributed priority network
US4038644A (en) * 1975-11-19 1977-07-26 Ncr Corporation Destination selection apparatus for a bus oriented computer system
US4067059A (en) * 1976-01-29 1978-01-03 Sperry Rand Corporation Shared direct memory access controller
US4041472A (en) * 1976-04-29 1977-08-09 Ncr Corporation Data processing internal communications system having plural time-shared intercommunication buses and inter-bus communication means
US4079452A (en) * 1976-06-15 1978-03-14 Bunker Ramo Corporation Programmable controller with modular firmware for communication control

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810114A (en) * 1971-12-29 1974-05-07 Tokyo Shibaura Electric Co Data processing system
US4001784A (en) * 1973-12-27 1977-01-04 Honeywell Information Systems Italia Data processing system having a plurality of input/output channels and physical resources dedicated to distinct and interruptible service levels
US3999163A (en) * 1974-01-10 1976-12-21 Digital Equipment Corporation Secondary storage facility for data processing systems
US3959775A (en) * 1974-08-05 1976-05-25 Gte Automatic Electric Laboratories Incorporated Multiprocessing system implemented with microprocessors
US4120029A (en) * 1976-12-27 1978-10-10 Honeywell Information Systems, Inc. Method and apparatus for recovering a signal transferred over a common bus in a data processing system

Also Published As

Publication number Publication date
JPS55103622A (en) 1980-08-08
AU540401B2 (en) 1984-11-15
BE881410A (fr) 1980-05-16
JPS6030984B2 (ja) 1985-07-19
US4300194A (en) 1981-11-10
CA1153079A (fr) 1983-08-30
FR2456974B1 (fr) 1989-05-12
AU5504280A (en) 1980-08-07

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Legal Events

Date Code Title Description
ST Notification of lapse
AR Application made for restoration
DE Withdrawal due to an action of restoration