FR2453468B1 - - Google Patents

Info

Publication number
FR2453468B1
FR2453468B1 FR7908715A FR7908715A FR2453468B1 FR 2453468 B1 FR2453468 B1 FR 2453468B1 FR 7908715 A FR7908715 A FR 7908715A FR 7908715 A FR7908715 A FR 7908715A FR 2453468 B1 FR2453468 B1 FR 2453468B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7908715A
Other languages
French (fr)
Other versions
FR2453468A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CII HONEYWELL BULL
Original Assignee
CII HONEYWELL BULL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CII HONEYWELL BULL filed Critical CII HONEYWELL BULL
Priority to FR7908715A priority Critical patent/FR2453468A1/fr
Priority to US06/135,098 priority patent/US4355356A/en
Priority to EP80400439A priority patent/EP0017584A1/fr
Priority to JP4478480A priority patent/JPS5614363A/ja
Publication of FR2453468A1 publication Critical patent/FR2453468A1/fr
Application granted granted Critical
Publication of FR2453468B1 publication Critical patent/FR2453468B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
FR7908715A 1979-04-06 1979-04-06 Procede et systeme d'exploitation d'une memoire adressable permettant d'associer a volonte des qualificatifs aux donnees contenues dans la memoire Granted FR2453468A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR7908715A FR2453468A1 (fr) 1979-04-06 1979-04-06 Procede et systeme d'exploitation d'une memoire adressable permettant d'associer a volonte des qualificatifs aux donnees contenues dans la memoire
US06/135,098 US4355356A (en) 1979-04-06 1980-03-28 Process and data system using data qualifiers
EP80400439A EP0017584A1 (fr) 1979-04-06 1980-04-02 Procédé et système d'exploitation d'une mémoire adressable permettant d'associer à volonté des qualificatifs aux données contenues dans la mémoire
JP4478480A JPS5614363A (en) 1979-04-06 1980-04-07 Method of and apparatus for utilizing addressing memory allowing relating data contained in memory to defined condition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7908715A FR2453468A1 (fr) 1979-04-06 1979-04-06 Procede et systeme d'exploitation d'une memoire adressable permettant d'associer a volonte des qualificatifs aux donnees contenues dans la memoire

Publications (2)

Publication Number Publication Date
FR2453468A1 FR2453468A1 (fr) 1980-10-31
FR2453468B1 true FR2453468B1 (oth) 1982-07-30

Family

ID=9224039

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7908715A Granted FR2453468A1 (fr) 1979-04-06 1979-04-06 Procede et systeme d'exploitation d'une memoire adressable permettant d'associer a volonte des qualificatifs aux donnees contenues dans la memoire

Country Status (4)

Country Link
US (1) US4355356A (oth)
EP (1) EP0017584A1 (oth)
JP (1) JPS5614363A (oth)
FR (1) FR2453468A1 (oth)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8203844A (nl) * 1982-10-04 1984-05-01 Philips Nv Geintegreerde, als bouwsteen uitgevoerde sorteerinrichting voor datawoorden en geintegreerde, dataverwerkende, processor voorzien van zo een meegeintegreerde sorteerinrichting.
US5161219A (en) * 1989-01-13 1992-11-03 International Business Machines Corporation Computer system with input/output cache

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2843841A (en) * 1954-09-20 1958-07-15 Internat Telemeter Corp Information storage system
NL267514A (oth) * 1960-07-25
US3434116A (en) * 1966-06-15 1969-03-18 Ibm Scheme for circumventing bad memory cells
GB1254929A (en) * 1969-03-26 1971-11-24 Standard Telephones Cables Ltd Improvements in or relating to digital computers
US3633175A (en) * 1969-05-15 1972-01-04 Honeywell Inc Defect-tolerant digital memory system
NL7004570A (oth) * 1970-03-31 1971-10-04
US3725872A (en) * 1971-03-03 1973-04-03 Burroughs Corp Data processing system having status indicating and storage means
US3818459A (en) * 1972-12-19 1974-06-18 Dimensional Syst Inc Auxiliary memory interface system
US3828327A (en) * 1973-04-30 1974-08-06 Ibm Simplified storage protection and address translation under system mode control in a data processing system
US3893084A (en) * 1973-05-01 1975-07-01 Digital Equipment Corp Memory access control system
US4045779A (en) * 1976-03-15 1977-08-30 Xerox Corporation Self-correcting memory circuit
US4058851A (en) * 1976-10-18 1977-11-15 Sperry Rand Corporation Conditional bypass of error correction for dual memory access time selection
DE2714314C2 (de) * 1977-03-31 1983-10-20 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Datenverarbeitende Vorrichtung mit einem Datenspeicher
FR2412107A1 (fr) * 1977-12-16 1979-07-13 Option Systeme a logique programmee

Also Published As

Publication number Publication date
US4355356A (en) 1982-10-19
JPS5614363A (en) 1981-02-12
EP0017584A1 (fr) 1980-10-15
FR2453468A1 (fr) 1980-10-31

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Legal Events

Date Code Title Description
ER Errata listed in the french official journal (bopi)
ST Notification of lapse