FR2428283A1 - DEVICE LOCATED IN MICROPROCESSORS FOR REALIZING MULTIPROCESSOR SYSTEMS - Google Patents

DEVICE LOCATED IN MICROPROCESSORS FOR REALIZING MULTIPROCESSOR SYSTEMS

Info

Publication number
FR2428283A1
FR2428283A1 FR7913591A FR7913591A FR2428283A1 FR 2428283 A1 FR2428283 A1 FR 2428283A1 FR 7913591 A FR7913591 A FR 7913591A FR 7913591 A FR7913591 A FR 7913591A FR 2428283 A1 FR2428283 A1 FR 2428283A1
Authority
FR
France
Prior art keywords
microprocessors
device located
realizing
line
multiprocessor systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR7913591A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2428283A1 publication Critical patent/FR2428283A1/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4031—Coupling between buses using bus bridges with arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)

Abstract

L'invention concerne un dispositif situé dans des microprocesseurs pour réaliser des systèmes de multiprocesseurs. Dans ce dispositif situe dans des microprocesseurs (1, 2) accouplés à une ligne omnibus du système 10), raccordée à une mémoire (3) et à une unité d'entrée/sortie (4) et dans lequel il est prévu une entrée (HOLD) de demande de blocage d'accès à la ligne omnibus et une sortie (HOLDA) pour la délivrance d'un accusé de réception, il est prévu un émetteur pour délivrer des demandes de blocage (BUS REQ) demandant un accès à la ligne omnibus du système, et un récepteur délivrant des accusés de réception (BPRI) autorisant des accès à la ligne omnibus. Application notamment à des systèmes d'ordinateurs de traitement de données.The invention relates to a device located in microprocessors for realizing multiprocessor systems. In this device located in microprocessors (1, 2) coupled to a bus line of the system 10), connected to a memory (3) and to an input / output unit (4) and in which an input ( HOLD) request for blocking access to the bus line and an output (HOLDA) for issuing an acknowledgment of receipt, a transmitter is provided to deliver blocking requests (BUS REQ) requesting access to the line omnibus system, and a receiver delivering acknowledgments of receipt (BPRI) authorizing access to the omnibus line. Application in particular to computer systems for processing data.

FR7913591A 1978-06-05 1979-05-29 DEVICE LOCATED IN MICROPROCESSORS FOR REALIZING MULTIPROCESSOR SYSTEMS Pending FR2428283A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782824557 DE2824557C2 (en) 1978-06-05 1978-06-05 Arrangement in microprocessors for the construction of multiprocessor systems

Publications (1)

Publication Number Publication Date
FR2428283A1 true FR2428283A1 (en) 1980-01-04

Family

ID=6041047

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7913591A Pending FR2428283A1 (en) 1978-06-05 1979-05-29 DEVICE LOCATED IN MICROPROCESSORS FOR REALIZING MULTIPROCESSOR SYSTEMS

Country Status (5)

Country Link
JP (1) JPS54159842A (en)
BR (1) BR7903495A (en)
DE (1) DE2824557C2 (en)
FR (1) FR2428283A1 (en)
GB (1) GB2022299B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412281A (en) * 1980-07-11 1983-10-25 Raytheon Company Distributed signal processing system
CH651951A5 (en) * 1980-10-20 1985-10-15 Inventio Ag DEVICE FOR CONTROLLING access from PROCESSORS ON A DATA LINE.
US4528626A (en) * 1984-03-19 1985-07-09 International Business Machines Corporation Microcomputer system with bus control means for peripheral processing devices
JPS60258671A (en) * 1984-06-05 1985-12-20 Nec Corp Processor
DE10149296B4 (en) * 2001-10-05 2007-01-04 Siemens Ag Multiprocessor system

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
COMPUTER DESIGN, vol. 13, no. 3, mars 1974 CONCORD (US) *
COMPUTER DESIGN, vol. 17, no. 3, mars 1978 CONCORD (US) *
SIEMENS FORSCHUNGS & ENTWICKL, vol. 7, no. 6, 1978, Springer Verlag BERLIN (DE) *

Also Published As

Publication number Publication date
GB2022299A (en) 1979-12-12
DE2824557C2 (en) 1983-01-20
JPS54159842A (en) 1979-12-18
BR7903495A (en) 1980-01-22
GB2022299B (en) 1982-06-23
DE2824557A1 (en) 1979-12-06

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