FR2412122A1 - Interconnection for microprocessors controlling complex system - uses microprocessors split into two groups with one connected to lines and other to columns of interconnection matrix - Google Patents
Interconnection for microprocessors controlling complex system - uses microprocessors split into two groups with one connected to lines and other to columns of interconnection matrixInfo
- Publication number
- FR2412122A1 FR2412122A1 FR7737799A FR7737799A FR2412122A1 FR 2412122 A1 FR2412122 A1 FR 2412122A1 FR 7737799 A FR7737799 A FR 7737799A FR 7737799 A FR7737799 A FR 7737799A FR 2412122 A1 FR2412122 A1 FR 2412122A1
- Authority
- FR
- France
- Prior art keywords
- microprocessors
- interconnection
- matrix
- columns
- lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
The interconnection arrangement is for a number of microprocessor sharing logical functions and exchanging data indigital form via transmission lines. The arrangement includes a matrix of interconnection elements each having a memory which is accessible by two routes. One route along the line of the matrix, the other along the columns. A group of microprocessors, isolated from each other, are connected to the lines of the matrix. Another individually isolated group of microprocessors is connected to the columns of the matrix. An exclusion circuit is connected to the two groups of microprocessors and to the matrix interconnection elements stops any simultaneous action of two microprocessors on the same interconnection element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7737799A FR2412122A1 (en) | 1977-12-15 | 1977-12-15 | Interconnection for microprocessors controlling complex system - uses microprocessors split into two groups with one connected to lines and other to columns of interconnection matrix |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7737799A FR2412122A1 (en) | 1977-12-15 | 1977-12-15 | Interconnection for microprocessors controlling complex system - uses microprocessors split into two groups with one connected to lines and other to columns of interconnection matrix |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2412122A1 true FR2412122A1 (en) | 1979-07-13 |
FR2412122B1 FR2412122B1 (en) | 1981-11-27 |
Family
ID=9198886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7737799A Granted FR2412122A1 (en) | 1977-12-15 | 1977-12-15 | Interconnection for microprocessors controlling complex system - uses microprocessors split into two groups with one connected to lines and other to columns of interconnection matrix |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2412122A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0147295A2 (en) * | 1983-12-26 | 1985-07-03 | Fujitsu Limited | Data processing system including a plurality of multiprocessor systems |
-
1977
- 1977-12-15 FR FR7737799A patent/FR2412122A1/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0147295A2 (en) * | 1983-12-26 | 1985-07-03 | Fujitsu Limited | Data processing system including a plurality of multiprocessor systems |
EP0147295A3 (en) * | 1983-12-26 | 1987-11-19 | Fujitsu Limited | Data processing system including a plurality of multiprocessor systems |
Also Published As
Publication number | Publication date |
---|---|
FR2412122B1 (en) | 1981-11-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |