FR2360131A1 - Synchronizing appts. for byte and frame - used in loop system coupling CPU channel to bulk storage devices - Google Patents

Synchronizing appts. for byte and frame - used in loop system coupling CPU channel to bulk storage devices

Info

Publication number
FR2360131A1
FR2360131A1 FR7718260A FR7718260A FR2360131A1 FR 2360131 A1 FR2360131 A1 FR 2360131A1 FR 7718260 A FR7718260 A FR 7718260A FR 7718260 A FR7718260 A FR 7718260A FR 2360131 A1 FR2360131 A1 FR 2360131A1
Authority
FR
France
Prior art keywords
frame
appts
synchronizing
byte
storage devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7718260A
Other languages
French (fr)
Other versions
FR2360131B1 (en
Inventor
Abraham M Gindi
Donald J Lang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/708,509 external-priority patent/US4103336A/en
Priority claimed from US05/713,453 external-priority patent/US4042783A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2360131A1 publication Critical patent/FR2360131A1/en
Application granted granted Critical
Publication of FR2360131B1 publication Critical patent/FR2360131B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master

Abstract

The appts. synchronises frame delimited bit stream messages on a high speed lop for communication among storage system elements. The method esp. minimizes the time for attaining frame and byte synchronization among terminals attaching storage elements to the loop. The method comprises the steps synchronizing terminals downstream from a fault terminal to a first synch reference as generated by the faulty terminal and further synching the terminals upstream to a second synch pattern generated by the primary terminal responsive to the first reference. As a consequence, the system resynchs as a function of resynching of the faulty station alone.
FR7718260A 1976-07-26 1977-06-09 Synchronizing appts. for byte and frame - used in loop system coupling CPU channel to bulk storage devices Granted FR2360131A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/708,509 US4103336A (en) 1976-07-26 1976-07-26 Method and apparatus for allocating bandwidth on a loop system coupling a cpu channel to bulk storage devices
US05/713,453 US4042783A (en) 1976-08-11 1976-08-11 Method and apparatus for byte and frame synchronization on a loop system coupling a CPU channel to bulk storage devices

Publications (2)

Publication Number Publication Date
FR2360131A1 true FR2360131A1 (en) 1978-02-24
FR2360131B1 FR2360131B1 (en) 1980-04-04

Family

ID=27108099

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7718260A Granted FR2360131A1 (en) 1976-07-26 1977-06-09 Synchronizing appts. for byte and frame - used in loop system coupling CPU channel to bulk storage devices

Country Status (1)

Country Link
FR (1) FR2360131A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0159941A2 (en) * 1984-04-10 1985-10-30 Telemecanique Serial interconnecting bus for a data processing system, and method for information exchange

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0159941A2 (en) * 1984-04-10 1985-10-30 Telemecanique Serial interconnecting bus for a data processing system, and method for information exchange
EP0159941A3 (en) * 1984-04-10 1987-12-02 La Telemecanique Electrique Serial interconnecting bus for a data processing system, and method for information exchange

Also Published As

Publication number Publication date
FR2360131B1 (en) 1980-04-04

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Legal Events

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