FR2337464A1 - Dispositif de commande optimal pour circuit integre a grande echelle - Google Patents

Dispositif de commande optimal pour circuit integre a grande echelle

Info

Publication number
FR2337464A1
FR2337464A1 FR7636402A FR7636402A FR2337464A1 FR 2337464 A1 FR2337464 A1 FR 2337464A1 FR 7636402 A FR7636402 A FR 7636402A FR 7636402 A FR7636402 A FR 7636402A FR 2337464 A1 FR2337464 A1 FR 2337464A1
Authority
FR
France
Prior art keywords
control device
integrated circuit
optimal control
scale integrated
scale
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7636402A
Other languages
English (en)
Other versions
FR2337464B1 (fr
Inventor
Robert A Henle
Irving T Ho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2337464A1 publication Critical patent/FR2337464A1/fr
Application granted granted Critical
Publication of FR2337464B1 publication Critical patent/FR2337464B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/02—Shaping pulses by amplifying
    • H03K5/023—Shaping pulses by amplifying using field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR7636402A 1975-12-31 1976-11-29 Dispositif de commande optimal pour circuit integre a grande echelle Granted FR2337464A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/645,765 US4016431A (en) 1975-12-31 1975-12-31 Optimal driver for LSI

Publications (2)

Publication Number Publication Date
FR2337464A1 true FR2337464A1 (fr) 1977-07-29
FR2337464B1 FR2337464B1 (fr) 1979-09-21

Family

ID=24590400

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7636402A Granted FR2337464A1 (fr) 1975-12-31 1976-11-29 Dispositif de commande optimal pour circuit integre a grande echelle

Country Status (8)

Country Link
US (1) US4016431A (fr)
JP (1) JPS583608B2 (fr)
CA (1) CA1081803A (fr)
DE (1) DE2649356C3 (fr)
FR (1) FR2337464A1 (fr)
GB (1) GB1563358A (fr)
IT (1) IT1074186B (fr)
NL (1) NL7614121A (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4140921A (en) * 1977-08-31 1979-02-20 International Business Machines Corporation Generalized performance power optimized PLA circuits
DE2826624C2 (de) * 1978-06-19 1982-11-04 Deutsche Itt Industries Gmbh, 7800 Freiburg Integrierte IGFET-Konstantstromquelle
EP0055795B1 (fr) * 1980-12-20 1985-12-18 Deutsche ITT Industries GmbH Circuit driver rapide du type MOS pour signaux numériques
US4714840A (en) * 1982-12-30 1987-12-22 Thomson Components - Mostek Corporation MOS transistor circuits having matched channel width and length dimensions
US4585953A (en) * 1983-07-20 1986-04-29 International Business Machines Corporation Low power off-chip driver circuit
DE3835119A1 (de) * 1988-10-14 1990-04-19 Siemens Ag Leistungsverstaerkerschaltung fuer integrierte digitalschaltungen
US5030853A (en) * 1990-03-21 1991-07-09 Thunderbird Technologies, Inc. High speed logic and memory family using ring segment buffer
US5321320A (en) * 1992-08-03 1994-06-14 Unisys Corporation ECL driver with adjustable rise and fall times, and method therefor
US7032146B2 (en) * 2002-10-29 2006-04-18 International Business Machines Corporation Boundary scan apparatus and interconnect test method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3378783A (en) * 1965-12-13 1968-04-16 Rca Corp Optimized digital amplifier utilizing insulated-gate field-effect transistors

Also Published As

Publication number Publication date
FR2337464B1 (fr) 1979-09-21
DE2649356B2 (de) 1979-06-21
NL7614121A (nl) 1977-07-04
IT1074186B (it) 1985-04-17
DE2649356C3 (de) 1980-02-28
JPS5285440A (en) 1977-07-15
DE2649356A1 (de) 1977-07-07
JPS583608B2 (ja) 1983-01-22
US4016431A (en) 1977-04-05
CA1081803A (fr) 1980-07-15
GB1563358A (en) 1980-03-26

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Legal Events

Date Code Title Description
ST Notification of lapse