FR2315744B1 - - Google Patents

Info

Publication number
FR2315744B1
FR2315744B1 FR7520222A FR7520222A FR2315744B1 FR 2315744 B1 FR2315744 B1 FR 2315744B1 FR 7520222 A FR7520222 A FR 7520222A FR 7520222 A FR7520222 A FR 7520222A FR 2315744 B1 FR2315744 B1 FR 2315744B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7520222A
Other versions
FR2315744A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SEMS
Original Assignee
SEMS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SEMS filed Critical SEMS
Priority to FR7520222A priority Critical patent/FR2315744A1/fr
Publication of FR2315744A1 publication Critical patent/FR2315744A1/fr
Application granted granted Critical
Publication of FR2315744B1 publication Critical patent/FR2315744B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR7520222A 1975-06-27 1975-06-27 Dispositif auxiliaire d'adressage virtuel Granted FR2315744A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7520222A FR2315744A1 (fr) 1975-06-27 1975-06-27 Dispositif auxiliaire d'adressage virtuel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7520222A FR2315744A1 (fr) 1975-06-27 1975-06-27 Dispositif auxiliaire d'adressage virtuel

Publications (2)

Publication Number Publication Date
FR2315744A1 FR2315744A1 (fr) 1977-01-21
FR2315744B1 true FR2315744B1 (fr) 1979-10-19

Family

ID=9157172

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7520222A Granted FR2315744A1 (fr) 1975-06-27 1975-06-27 Dispositif auxiliaire d'adressage virtuel

Country Status (1)

Country Link
FR (1) FR2315744A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2008821B (en) * 1977-11-04 1982-01-13 Sperry Rand Corp Digital computers
US4637024A (en) * 1984-11-02 1987-01-13 International Business Machines Corporation Redundant page identification for a catalogued memory
SG45399A1 (en) * 1994-01-12 1998-01-16 Sun Microsystems Inc Logically addressable physical memory for a virtual memory computer system that support multiple page sizes

Also Published As

Publication number Publication date
FR2315744A1 (fr) 1977-01-21

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Legal Events

Date Code Title Description
TP Transmission of property
TP Transmission of property
ST Notification of lapse